[llvm] febcf99 - [AMDGPU] Replace std::pair with VOPDCombineInfo in VOPD combine. NFC.

[Stanislav Mekhanoshin via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2023-06-06T12:53:23-07:00
New Revision: febcf99e9d2c82f121fcf35ad36badf9b8ff8052

URL: https://github.com/llvm/llvm-project/commit/febcf99e9d2c82f121fcf35ad36badf9b8ff8052
DIFF: https://github.com/llvm/llvm-project/commit/febcf99e9d2c82f121fcf35ad36badf9b8ff8052.diff

LOG: [AMDGPU] Replace std::pair with VOPDCombineInfo in VOPD combine. NFC.

The future patch will carry additional info there.

Differential Revision: https://reviews.llvm.org/D152302

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp b/llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
index f2452a275bdca..c9e0c68495681 100644
--- a/llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
@@ -42,6 +42,16 @@ namespace {
 
 class GCNCreateVOPD : public MachineFunctionPass {
 private:
+    class VOPDCombineInfo {
+    public:
+      VOPDCombineInfo() {}
+      VOPDCombineInfo(MachineInstr *First, MachineInstr *Second)
+          : FirstMI(First), SecondMI(Second) {}
+
+      MachineInstr *FirstMI;
+      MachineInstr *SecondMI;
+    };
+
 public:
   static char ID;
   const GCNSubtarget *ST = nullptr;
@@ -57,10 +67,9 @@ class GCNCreateVOPD : public MachineFunctionPass {
     return "GCN Create VOPD Instructions";
   }
 
-  bool doReplace(const SIInstrInfo *SII,
-                 std::pair<MachineInstr *, MachineInstr *> &Pair) {
-    auto *FirstMI = Pair.first;
-    auto *SecondMI = Pair.second;
+  bool doReplace(const SIInstrInfo *SII, VOPDCombineInfo &CI) {
+    auto *FirstMI = CI.FirstMI;
+    auto *SecondMI = CI.SecondMI;
     unsigned Opc1 = FirstMI->getOpcode();
     unsigned Opc2 = SecondMI->getOpcode();
     int NewOpcode = AMDGPU::getVOPDFull(AMDGPU::getVOPDOpcode(Opc1),
@@ -94,7 +103,7 @@ class GCNCreateVOPD : public MachineFunctionPass {
       VOPDInst.copyImplicitOps(*MI[CompIdx]);
 
     LLVM_DEBUG(dbgs() << "VOPD Fused: " << *VOPDInst << " from\tX: "
-                      << *Pair.first << "\tY: " << *Pair.second << "\n");
+                      << *CI.FirstMI << "\tY: " << *CI.SecondMI << "\n");
 
     for (auto CompIdx : VOPD::COMPONENTS)
       MI[CompIdx]->eraseFromParent();
@@ -114,7 +123,7 @@ class GCNCreateVOPD : public MachineFunctionPass {
     const SIInstrInfo *SII = ST->getInstrInfo();
     bool Changed = false;
 
-    SmallVector<std::pair<MachineInstr *, MachineInstr *>> ReplaceCandidates;
+    SmallVector<VOPDCombineInfo> ReplaceCandidates;
 
     for (auto &MBB : MF) {
       auto MII = MBB.begin(), E = MBB.end();
@@ -130,24 +139,24 @@ class GCNCreateVOPD : public MachineFunctionPass {
         unsigned Opc2 = SecondMI->getOpcode();
         llvm::AMDGPU::CanBeVOPD FirstCanBeVOPD = AMDGPU::getCanBeVOPD(Opc);
         llvm::AMDGPU::CanBeVOPD SecondCanBeVOPD = AMDGPU::getCanBeVOPD(Opc2);
-        std::pair<MachineInstr *, MachineInstr *> Pair;
+        VOPDCombineInfo CI;
 
         if (FirstCanBeVOPD.X && SecondCanBeVOPD.Y)
-          Pair = {FirstMI, SecondMI};
+          CI = VOPDCombineInfo(FirstMI, SecondMI);
         else if (FirstCanBeVOPD.Y && SecondCanBeVOPD.X)
-          Pair = {SecondMI, FirstMI};
+          CI = VOPDCombineInfo(SecondMI, FirstMI);
         else
           continue;
         // checkVOPDRegConstraints cares about program order, but doReplace
         // cares about X-Y order in the constituted VOPD
         if (llvm::checkVOPDRegConstraints(*SII, *FirstMI, *SecondMI)) {
-          ReplaceCandidates.push_back(Pair);
+          ReplaceCandidates.push_back(CI);
           ++MII;
         }
       }
     }
-    for (auto &Pair : ReplaceCandidates) {
-      Changed |= doReplace(SII, Pair);
+    for (auto &CI : ReplaceCandidates) {
+      Changed |= doReplace(SII, CI);
     }
 
     return Changed;