[PATCH] D152300: [RISCV] Add early out to generateInstSeq when the initial sequence is 1 or 2 instructions.

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 6 12:32:29 PDT 2023

Previous message: [PATCH] D152300: [RISCV] Add early out to generateInstSeq when the initial sequence is 1 or 2 instructions.
Next message: [PATCH] D152300: [RISCV] Add early out to generateInstSeq when the initial sequence is 1 or 2 instructions.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

reames accepted this revision.
reames added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152300/new/

https://reviews.llvm.org/D152300

Previous message: [PATCH] D152300: [RISCV] Add early out to generateInstSeq when the initial sequence is 1 or 2 instructions.
Next message: [PATCH] D152300: [RISCV] Add early out to generateInstSeq when the initial sequence is 1 or 2 instructions.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list