[PATCH] D142782: [AMDGPU] Add basic support for extended i8 perm matching

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:9995
+static const std::optional<ByteProvider<SDValue>>
+calculateSrcByte(const SDValue &Op, uint64_t DestByte, uint64_t SrcIndex = 0,
+                 unsigned Depth = 0) {
----------------
No reference


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:10337
+        // TODO -- whitelist more uses
+        for (auto VectorwiseOp : {ISD::STORE})
+          if (VUse->getOpcode() == VectorwiseOp)
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Doesn't feel like this is the right way to express it. Should handle CopyToRegs at least too


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:10344
+
+    if (!llvm::any_of(N->uses(), usesCombinedOperand))
+      return SDValue();
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Don't need llvm::


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:10401
+      int FirstSrc = 0;
+      std::optional<int> SecondSrc = std::nullopt;
+      uint64_t permMask = 0x00000000;
----------------
Don't these default initialize to nullopt?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D142782/new/

https://reviews.llvm.org/D142782