[llvm] 06e253c - [RISCV] Rework .option arch target streamer interface
Jessica Clarke via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 6 06:56:32 PDT 2023
Author: Jessica Clarke
Date: 2023-06-06T14:56:20+01:00
New Revision: 06e253c10d6cbeb7242810b3cca0440892b0acf0
URL: https://github.com/llvm/llvm-project/commit/06e253c10d6cbeb7242810b3cca0440892b0acf0
DIFF: https://github.com/llvm/llvm-project/commit/06e253c10d6cbeb7242810b3cca0440892b0acf0.diff
LOG: [RISCV] Rework .option arch target streamer interface
The current interface requires some rather ugly tracking of state due to
splitting up the calls for each argument. Instead, pack them all into a
single call by passing an ArrayRef. Also clean up the dodgy whitespace
emitted for the directive whilst here; there was a stray space between
the tab and .option, and there was a tab rather than a space after the
first comma for some strange reason.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D152193
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 9e2e884c17ba6..3baff0e688b86 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -2711,28 +2711,21 @@ bool RISCVAsmParser::parseDirectiveOption() {
}
if (Option == "arch") {
- bool PrefixEmitted = false;
- bool IsExtensionList = false;
+ SmallVector<RISCVOptionArchArg> Args;
do {
if (Parser.parseComma())
return true;
- bool IsAdd, IsFull;
- if (parseOptionalToken(AsmToken::Plus)) {
- IsAdd = true;
- IsFull = false;
- IsExtensionList = true;
- } else if (parseOptionalToken(AsmToken::Minus)) {
- IsAdd = false;
- IsFull = false;
- IsExtensionList = true;
- } else {
- if (IsExtensionList)
- return Error(Parser.getTok().getLoc(),
- "unexpected token, expected + or -");
-
- IsFull = true;
- }
+ RISCVOptionArchArgType Type;
+ if (parseOptionalToken(AsmToken::Plus))
+ Type = RISCVOptionArchArgType::Plus;
+ else if (parseOptionalToken(AsmToken::Minus))
+ Type = RISCVOptionArchArgType::Minus;
+ else if (!Args.empty())
+ return Error(Parser.getTok().getLoc(),
+ "unexpected token, expected + or -");
+ else
+ Type = RISCVOptionArchArgType::Full;
if (Parser.getTok().isNot(AsmToken::Identifier))
return Error(Parser.getTok().getLoc(),
@@ -2742,14 +2735,12 @@ bool RISCVAsmParser::parseDirectiveOption() {
SMLoc Loc = Parser.getTok().getLoc();
Parser.Lex();
- if (IsFull) {
+ if (Type == RISCVOptionArchArgType::Full) {
std::string Result;
if (resetToArch(Arch, Loc, Result, true))
return true;
- getTargetStreamer().emitDirectiveOptionArchFullArch(Result,
- PrefixEmitted);
-
+ Args.emplace_back(Type, Result);
break;
}
@@ -2764,8 +2755,9 @@ bool RISCVAsmParser::parseDirectiveOption() {
return Error(Loc, "unknown extension feature");
}
- bool HasComma = getTok().is(AsmToken::Comma);
- if (IsAdd) {
+ Args.emplace_back(Type, Ext->Key);
+
+ if (Type == RISCVOptionArchArgType::Plus) {
setFeatureBits(Ext->Value, Ext->Key);
auto ParseResult = RISCVFeatures::parseFeatureBits(isRV64(), STI->getFeatureBits());
if (!ParseResult) {
@@ -2777,9 +2769,8 @@ bool RISCVAsmParser::parseDirectiveOption() {
return Error(Loc, OutputErrMsg.str());
}
- getTargetStreamer().emitDirectiveOptionArchPlusOrMinus(
- Ext->Key, /*Enable*/ true, PrefixEmitted, HasComma);
} else {
+ assert(Type == RISCVOptionArchArgType::Minus);
// It is invalid to disable an extension that there are other enabled
// extensions depend on it.
// TODO: Make use of RISCVISAInfo to handle this
@@ -2793,14 +2784,13 @@ bool RISCVAsmParser::parseDirectiveOption() {
}
clearFeatureBits(Ext->Value, Ext->Key);
- getTargetStreamer().emitDirectiveOptionArchPlusOrMinus(
- Ext->Key, /*Enable*/ false, PrefixEmitted, HasComma);
}
} while (Parser.getTok().isNot(AsmToken::EndOfStatement));
if (Parser.parseEOL())
return true;
+ getTargetStreamer().emitDirectiveOptionArch(Args);
return false;
}
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
index 28e7fc6157c3a..29ffc3224b525 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
@@ -33,12 +33,9 @@ void RISCVTargetStreamer::emitDirectiveOptionRVC() {}
void RISCVTargetStreamer::emitDirectiveOptionNoRVC() {}
void RISCVTargetStreamer::emitDirectiveOptionRelax() {}
void RISCVTargetStreamer::emitDirectiveOptionNoRelax() {}
+void RISCVTargetStreamer::emitDirectiveOptionArch(
+ ArrayRef<RISCVOptionArchArg> Args) {}
void RISCVTargetStreamer::emitDirectiveVariantCC(MCSymbol &Symbol) {}
-void RISCVTargetStreamer::emitDirectiveOptionArchFullArch(StringRef Value,
- bool &PrefixEmitted) {
-}
-void RISCVTargetStreamer::emitDirectiveOptionArchPlusOrMinus(
- StringRef Value, bool Enable, bool &PrefixEmitted, bool EmitComma) {}
void RISCVTargetStreamer::emitAttribute(unsigned Attribute, unsigned Value) {}
void RISCVTargetStreamer::finishAttributeSection() {}
void RISCVTargetStreamer::emitTextAttribute(unsigned Attribute,
@@ -106,6 +103,26 @@ void RISCVTargetAsmStreamer::emitDirectiveOptionNoRelax() {
OS << "\t.option\tnorelax\n";
}
+void RISCVTargetAsmStreamer::emitDirectiveOptionArch(
+ ArrayRef<RISCVOptionArchArg> Args) {
+ OS << "\t.option\tarch";
+ for (const auto &Arg : Args) {
+ OS << ", ";
+ switch (Arg.Type) {
+ case RISCVOptionArchArgType::Full:
+ break;
+ case RISCVOptionArchArgType::Plus:
+ OS << "+";
+ break;
+ case RISCVOptionArchArgType::Minus:
+ OS << "-";
+ break;
+ }
+ OS << Arg.Value;
+ }
+ OS << "\n";
+}
+
void RISCVTargetAsmStreamer::emitDirectiveVariantCC(MCSymbol &Symbol) {
OS << "\t.variant_cc\t" << Symbol.getName() << "\n";
}
@@ -123,33 +140,4 @@ void RISCVTargetAsmStreamer::emitIntTextAttribute(unsigned Attribute,
unsigned IntValue,
StringRef StringValue) {}
-static void emitDirectiveOptionArchPrefix(formatted_raw_ostream &OS,
- bool &PrefixEmitted) {
- if (!PrefixEmitted) {
- OS << "\t .option\tarch,\t";
- PrefixEmitted = true;
- }
-}
-
-static void emitCommaOrNextLine(formatted_raw_ostream &OS, bool EmitComma) {
- if (EmitComma)
- OS << ", ";
- else
- OS << "\n";
-}
-
-void RISCVTargetAsmStreamer::emitDirectiveOptionArchFullArch(
- StringRef Value, bool &PrefixEmitted) {
- emitDirectiveOptionArchPrefix(OS, PrefixEmitted);
- OS << Value;
- emitCommaOrNextLine(OS, false);
-}
-
-void RISCVTargetAsmStreamer::emitDirectiveOptionArchPlusOrMinus(
- StringRef Value, bool Enable, bool &PrefixEmitted, bool EmitComma) {
- emitDirectiveOptionArchPrefix(OS, PrefixEmitted);
- OS << (Enable ? "+" : "-") << Value;
- emitCommaOrNextLine(OS, EmitComma);
-}
-
void RISCVTargetAsmStreamer::finishAttributeSection() {}
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
index 4baed99364b00..070e72fb157ae 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
@@ -17,6 +17,20 @@ namespace llvm {
class formatted_raw_ostream;
+enum class RISCVOptionArchArgType {
+ Full,
+ Plus,
+ Minus,
+};
+
+struct RISCVOptionArchArg {
+ RISCVOptionArchArgType Type;
+ std::string Value;
+
+ RISCVOptionArchArg(RISCVOptionArchArgType Type, std::string Value)
+ : Type(Type), Value(Value) {}
+};
+
class RISCVTargetStreamer : public MCTargetStreamer {
RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown;
@@ -33,12 +47,8 @@ class RISCVTargetStreamer : public MCTargetStreamer {
virtual void emitDirectiveOptionNoRVC();
virtual void emitDirectiveOptionRelax();
virtual void emitDirectiveOptionNoRelax();
+ virtual void emitDirectiveOptionArch(ArrayRef<RISCVOptionArchArg> Args);
virtual void emitDirectiveVariantCC(MCSymbol &Symbol);
- virtual void emitDirectiveOptionArchFullArch(StringRef Value,
- bool &PrefixEmitted);
- virtual void emitDirectiveOptionArchPlusOrMinus(StringRef Value, bool Enable,
- bool &PrefixEmitted,
- bool EmitComma);
virtual void emitAttribute(unsigned Attribute, unsigned Value);
virtual void finishAttributeSection();
virtual void emitTextAttribute(unsigned Attribute, StringRef String);
@@ -71,12 +81,8 @@ class RISCVTargetAsmStreamer : public RISCVTargetStreamer {
void emitDirectiveOptionNoRVC() override;
void emitDirectiveOptionRelax() override;
void emitDirectiveOptionNoRelax() override;
+ void emitDirectiveOptionArch(ArrayRef<RISCVOptionArchArg> Args) override;
void emitDirectiveVariantCC(MCSymbol &Symbol) override;
- void emitDirectiveOptionArchFullArch(StringRef Value,
- bool &PrefixEmitted) override;
- void emitDirectiveOptionArchPlusOrMinus(StringRef Value, bool Enable,
- bool &PrefixEmitted,
- bool EmitComma) override;
};
}
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