[llvm] 60b8019 - [GlobalIsel][X86] Legalize G_ANYEXT, G_SEXT, and G_ZEXT
Thorsten Schütt via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 6 03:22:16 PDT 2023
Author: Thorsten Schütt
Date: 2023-06-06T12:22:09+02:00
New Revision: 60b8019ea0dcf6fafeb3b89121f062f55bc5ee6c
URL: https://github.com/llvm/llvm-project/commit/60b8019ea0dcf6fafeb3b89121f062f55bc5ee6c
DIFF: https://github.com/llvm/llvm-project/commit/60b8019ea0dcf6fafeb3b89121f062f55bc5ee6c.diff
LOG: [GlobalIsel][X86] Legalize G_ANYEXT, G_SEXT, and G_ZEXT
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D152243
Added:
llvm/test/CodeGen/X86/GlobalISel/legaliz-zext.mir
llvm/test/CodeGen/X86/GlobalISel/legalize-anyext.mir
llvm/test/CodeGen/X86/GlobalISel/legalize-sext.mir
Modified:
llvm/lib/Target/X86/X86LegalizerInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
index 2d092f25355eb..86e014225a5f7 100644
--- a/llvm/lib/Target/X86/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
@@ -77,6 +77,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
const LLT s16 = LLT::scalar(16);
const LLT s32 = LLT::scalar(32);
const LLT s64 = LLT::scalar(64);
+ const LLT s128 = LLT::scalar(128);
const LLT sMaxScalar = Subtarget.is64Bit() ? s64 : s32;
const LLT v16s8 = LLT::fixed_vector(16, 8);
@@ -258,6 +259,18 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, sMaxScalar}});
+ // sext, zext, and anyext
+ getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT})
+ .legalIf([=](const LegalityQuery &Query) {
+ return typeInSet(0, {s8, s16, s32})(Query) ||
+ (Query.Opcode == G_ANYEXT && Query.Types[0] == s128) ||
+ (Is64Bit && Query.Types[0] == s64);
+ })
+ .widenScalarToNextPow2(0, /*Min=*/8)
+ .clampScalar(0, s8, sMaxScalar)
+ .widenScalarToNextPow2(1, /*Min=*/8)
+ .clampScalar(1, s8, sMaxScalar);
+
setLegalizerInfo32bit();
setLegalizerInfo64bit();
setLegalizerInfoSSE1();
@@ -302,7 +315,6 @@ void X86LegalizerInfo::setLegalizerInfo32bit() {
const LLT s16 = LLT::scalar(16);
const LLT s32 = LLT::scalar(32);
const LLT s64 = LLT::scalar(64);
- const LLT s128 = LLT::scalar(128);
auto &LegacyInfo = getLegacyLegalizerInfo();
@@ -340,13 +352,6 @@ void X86LegalizerInfo::setLegalizerInfo32bit() {
LegacyInfo.setAction({TargetOpcode::G_CONSTANT, Ty},
LegacyLegalizeActions::Legal);
- // Extensions
- for (auto Ty : {s8, s16, s32}) {
- LegacyInfo.setAction({G_ZEXT, Ty}, LegacyLegalizeActions::Legal);
- LegacyInfo.setAction({G_SEXT, Ty}, LegacyLegalizeActions::Legal);
- LegacyInfo.setAction({G_ANYEXT, Ty}, LegacyLegalizeActions::Legal);
- }
- LegacyInfo.setAction({G_ANYEXT, s128}, LegacyLegalizeActions::Legal);
getActionDefinitionsBuilder(G_SEXT_INREG).lower();
// Merge/Unmerge
@@ -390,11 +395,6 @@ void X86LegalizerInfo::setLegalizerInfo64bit() {
LegacyInfo.setAction({TargetOpcode::G_CONSTANT, s64},
LegacyLegalizeActions::Legal);
- // Extensions
- for (unsigned extOp : {G_ZEXT, G_SEXT, G_ANYEXT}) {
- LegacyInfo.setAction({extOp, s64}, LegacyLegalizeActions::Legal);
- }
-
getActionDefinitionsBuilder(G_SITOFP)
.legalForCartesianProduct({s32, s64})
.clampScalar(1, s32, s64)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legaliz-zext.mir b/llvm/test/CodeGen/X86/GlobalISel/legaliz-zext.mir
new file mode 100644
index 0000000000000..515bcc5ca1d92
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/legaliz-zext.mir
@@ -0,0 +1,70 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
+# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-32
+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-64
+
+# test exts
+
+...
+---
+name: test_zext12
+body: |
+ bb.1:
+ ; X86-32-LABEL: name: test_zext12
+ ; X86-32: [[DEF:%[0-9]+]]:_(s12) = IMPLICIT_DEF
+ ; X86-32-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[DEF]](s12)
+ ; X86-32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[ZEXT]](s32)
+ ; X86-32-NEXT: RET 0, implicit [[COPY]](s32)
+ ; X86-64-LABEL: name: test_zext12
+ ; X86-64: [[DEF:%[0-9]+]]:_(s12) = IMPLICIT_DEF
+ ; X86-64-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[DEF]](s12)
+ ; X86-64-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[ZEXT]](s32)
+ ; X86-64-NEXT: RET 0, implicit [[COPY]](s32)
+ %0:_(s12) = IMPLICIT_DEF
+ %1:_(s32) = G_ZEXT %0
+ %2:_(s32) = COPY %1(s32)
+ RET 0, implicit %2
+
+...
+---
+name: test_sext16b
+body: |
+ bb.1:
+ ; X86-32-LABEL: name: test_sext16b
+ ; X86-32: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
+ ; X86-32-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; X86-32-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[DEF]](s16), [[C]](s16)
+ ; X86-32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; X86-32-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[C1]](s32)
+ ; X86-32-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[MV1]](s64)
+ ; X86-32-NEXT: RET 0, implicit [[COPY]](s64)
+ ; X86-64-LABEL: name: test_sext16b
+ ; X86-64: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
+ ; X86-64-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[DEF]](s16)
+ ; X86-64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[ZEXT]](s64)
+ ; X86-64-NEXT: RET 0, implicit [[COPY]](s64)
+ %0:_(s16) = IMPLICIT_DEF
+ %1:_(s64) = G_ZEXT %0
+ %2:_(s64) = COPY %1(s64)
+ RET 0, implicit %2
+
+...
+---
+name: test_zext18
+body: |
+ bb.1:
+ ; X86-32-LABEL: name: test_zext18
+ ; X86-32: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
+ ; X86-32-NEXT: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[DEF]](s8)
+ ; X86-32-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[ZEXT]](s16)
+ ; X86-32-NEXT: RET 0, implicit [[COPY]](s16)
+ ; X86-64-LABEL: name: test_zext18
+ ; X86-64: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
+ ; X86-64-NEXT: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[DEF]](s8)
+ ; X86-64-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[ZEXT]](s16)
+ ; X86-64-NEXT: RET 0, implicit [[COPY]](s16)
+ %0:_(s8) = IMPLICIT_DEF
+ %1:_(s16) = G_ZEXT %0
+ %2:_(s16) = COPY %1(s16)
+ RET 0, implicit %2
+
+...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-anyext.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-anyext.mir
new file mode 100644
index 0000000000000..3331a27a91d3d
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-anyext.mir
@@ -0,0 +1,27 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
+# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-32
+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-64
+
+# test exts
+
+...
+---
+name: test_anyext16
+body: |
+ bb.1:
+ ; X86-32-LABEL: name: test_anyext16
+ ; X86-32: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
+ ; X86-32-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[DEF]](s16)
+ ; X86-32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
+ ; X86-32-NEXT: RET 0, implicit [[COPY]](s32)
+ ; X86-64-LABEL: name: test_anyext16
+ ; X86-64: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
+ ; X86-64-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[DEF]](s16)
+ ; X86-64-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
+ ; X86-64-NEXT: RET 0, implicit [[COPY]](s32)
+ %0:_(s16) = IMPLICIT_DEF
+ %1:_(s32) = G_ANYEXT %0
+ %2:_(s32) = COPY %1(s32)
+ RET 0, implicit %2
+
+...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-sext.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-sext.mir
new file mode 100644
index 0000000000000..f68cb47cf9269
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-sext.mir
@@ -0,0 +1,27 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
+# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-32
+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-64
+
+# test exts
+
+...
+---
+name: test_sext16
+body: |
+ bb.1:
+ ; X86-32-LABEL: name: test_sext16
+ ; X86-32: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
+ ; X86-32-NEXT: [[SEXT:%[0-9]+]]:_(s16) = G_SEXT [[DEF]](s8)
+ ; X86-32-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[SEXT]](s16)
+ ; X86-32-NEXT: RET 0, implicit [[COPY]](s16)
+ ; X86-64-LABEL: name: test_sext16
+ ; X86-64: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
+ ; X86-64-NEXT: [[SEXT:%[0-9]+]]:_(s16) = G_SEXT [[DEF]](s8)
+ ; X86-64-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[SEXT]](s16)
+ ; X86-64-NEXT: RET 0, implicit [[COPY]](s16)
+ %0:_(s8) = IMPLICIT_DEF
+ %1:_(s16) = G_SEXT %0
+ %2:_(s16) = COPY %1(s16)
+ RET 0, implicit %2
+
+...
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