[PATCH] D152222: [RISCV] Don't fold RISCVISD::VMV_V_X_VL series node and scalar load to vector load when scalar load is update load

[Zixuan Wu via Phabricator via llvm-commits]

zixuan-wu added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/fold-scalar-load-crash.ll:42
+if.then381:                                       ; preds = %for.body4
+  %sub382 = add i32 0, 0
+  br label %for.body4.backedge
----------------
pcwang-thead wrote:
> How about:
> ```
> 
> define i32 @test(i32 %size, ptr %add.ptr, i64 %const) {
> entry:
>   br label %for.body
> 
> for.body:                                         ; preds = %for.body, %entry
>   %add.ptr1 = getelementptr i8, ptr %add.ptr, i32 -1
>   %add.ptr2 = getelementptr i8, ptr %add.ptr1, i32 %size
>   %0 = load i8, ptr %add.ptr1, align 1
>   %1 = load i8, ptr %add.ptr2, align 1
>   %2 = insertelement <8 x i8> poison, i8 %0, i64 0
>   %3 = insertelement <8 x i8> %2, i8 0, i64 %const
>   %4 = insertelement <8 x i8> %3, i8 %1, i64 0
>   %5 = icmp ult <8 x i8> %4, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
>   %6 = bitcast <8 x i1> %5 to i8
>   %7 = zext i8 %6 to i32
>   %cond = icmp eq i32 %7, 0
>   br i1 %cond, label %if.then381, label %for.body
> 
> if.then381:                                       ; preds = %for.body
>   ret i32 0
> }
> ```
Thank you for providing this case. It works.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152222/new/

https://reviews.llvm.org/D152222