[PATCH] D152245: [AArch64] Add tablegen patterns for faddp of two extracts

David Sherwood via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 6 01:14:03 PDT 2023


david-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:8501
+// faddp extractlow(Rn), extracthigh(Rn)
+def : Pat<(AArch64faddp (extract_subvector (v4f32 FPR128:$Rn), (i64 0)),
+                        (extract_subvector (v4f32 FPR128:$Rn), (i64 2))),
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Hi @dmgreen, apologies for the drive-by comment, but I wonder if this needs a return type from `extract_subvector` in case it attempts to match the wrong subvector type? For example, in theory this may attempt to match

  AArch64faddp (v1i32 extract_subvector (v4f32 FPR128:$Rn), (i64 0)),
                          (v1i32 extract_subvector (v4f32 FPR128:$Rn), (i64 2)))

as well as the pattern I presume you actually want to match, which is

  AArch64faddp (v2i32 extract_subvector (v4f32 FPR128:$Rn), (i64 0)),
                          (v2i32 extract_subvector (v4f32 FPR128:$Rn), (i64 2)))

?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152245/new/

https://reviews.llvm.org/D152245



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