[llvm] 60b7dbb - [X86] Add test cases for D152227.
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 5 23:28:31 PDT 2023
Author: Luo, Yuanke
Date: 2023-06-06T14:24:46+08:00
New Revision: 60b7dbb670afceab7d897699e00073b50e4c384a
URL: https://github.com/llvm/llvm-project/commit/60b7dbb670afceab7d897699e00073b50e4c384a
DIFF: https://github.com/llvm/llvm-project/commit/60b7dbb670afceab7d897699e00073b50e4c384a.diff
LOG: [X86] Add test cases for D152227.
Added:
Modified:
llvm/test/CodeGen/X86/combine-movmsk-avx.ll
llvm/test/CodeGen/X86/combine-movmsk.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/combine-movmsk-avx.ll b/llvm/test/CodeGen/X86/combine-movmsk-avx.ll
index 8e09b4eb4877a..7897b0a3e4a89 100644
--- a/llvm/test/CodeGen/X86/combine-movmsk-avx.ll
+++ b/llvm/test/CodeGen/X86/combine-movmsk-avx.ll
@@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ADL
declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>)
declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>)
@@ -16,6 +17,15 @@ define i1 @movmskps_noneof_bitcast_v4f64(<4 x double> %a0) {
; CHECK-NEXT: sete %al
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: retq
+;
+; ADL-LABEL: movmskps_noneof_bitcast_v4f64:
+; ADL: # %bb.0:
+; ADL-NEXT: vxorpd %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm0
+; ADL-NEXT: vtestpd %ymm0, %ymm0
+; ADL-NEXT: sete %al
+; ADL-NEXT: vzeroupper
+; ADL-NEXT: retq
%1 = fcmp oeq <4 x double> %a0, zeroinitializer
%2 = sext <4 x i1> %1 to <4 x i64>
%3 = bitcast <4 x i64> %2 to <8 x float>
@@ -44,6 +54,16 @@ define i1 @movmskps_allof_bitcast_v4f64(<4 x double> %a0) {
; AVX2-NEXT: setb %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
+;
+; ADL-LABEL: movmskps_allof_bitcast_v4f64:
+; ADL: # %bb.0:
+; ADL-NEXT: vxorpd %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm0
+; ADL-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
+; ADL-NEXT: vtestpd %ymm1, %ymm0
+; ADL-NEXT: setb %al
+; ADL-NEXT: vzeroupper
+; ADL-NEXT: retq
%1 = fcmp oeq <4 x double> %a0, zeroinitializer
%2 = sext <4 x i1> %1 to <4 x i64>
%3 = bitcast <4 x i64> %2 to <8 x float>
@@ -71,6 +91,12 @@ define i32 @movmskpd_cmpgt_v4i64(<4 x i64> %a0) {
; AVX2-NEXT: vmovmskpd %ymm0, %eax
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
+;
+; ADL-LABEL: movmskpd_cmpgt_v4i64:
+; ADL: # %bb.0:
+; ADL-NEXT: vmovmskpd %ymm0, %eax
+; ADL-NEXT: vzeroupper
+; ADL-NEXT: retq
%1 = icmp sgt <4 x i64> zeroinitializer, %a0
%2 = sext <4 x i1> %1 to <4 x i64>
%3 = bitcast <4 x i64> %2 to <4 x double>
@@ -92,6 +118,12 @@ define i32 @movmskps_ashr_v8i32(<8 x i32> %a0) {
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
+;
+; ADL-LABEL: movmskps_ashr_v8i32:
+; ADL: # %bb.0:
+; ADL-NEXT: vmovmskps %ymm0, %eax
+; ADL-NEXT: vzeroupper
+; ADL-NEXT: retq
%1 = ashr <8 x i32> %a0, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
%2 = bitcast <8 x i32> %1 to <8 x float>
%3 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %2)
@@ -115,6 +147,13 @@ define i32 @movmskps_sext_v4i64(<4 x i32> %a0) {
; AVX2-NEXT: vmovmskpd %ymm0, %eax
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
+;
+; ADL-LABEL: movmskps_sext_v4i64:
+; ADL: # %bb.0:
+; ADL-NEXT: vpmovsxdq %xmm0, %ymm0
+; ADL-NEXT: vmovmskpd %ymm0, %eax
+; ADL-NEXT: vzeroupper
+; ADL-NEXT: retq
%1 = sext <4 x i32> %a0 to <4 x i64>
%2 = bitcast <4 x i64> %1 to <4 x double>
%3 = tail call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %2)
@@ -138,6 +177,13 @@ define i32 @movmskps_sext_v8i32(<8 x i16> %a0) {
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
+;
+; ADL-LABEL: movmskps_sext_v8i32:
+; ADL: # %bb.0:
+; ADL-NEXT: vpmovsxwd %xmm0, %ymm0
+; ADL-NEXT: vmovmskps %ymm0, %eax
+; ADL-NEXT: vzeroupper
+; ADL-NEXT: retq
%1 = sext <8 x i16> %a0 to <8 x i32>
%2 = bitcast <8 x i32> %1 to <8 x float>
%3 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %2)
@@ -153,6 +199,15 @@ define i32 @movmskps_concat_v4f32(<4 x float> %a0, <4 x float> %a1) {
; CHECK-NEXT: setne %al
; CHECK-NEXT: negl %eax
; CHECK-NEXT: retq
+;
+; ADL-LABEL: movmskps_concat_v4f32:
+; ADL: # %bb.0:
+; ADL-NEXT: vorps %xmm1, %xmm0, %xmm0
+; ADL-NEXT: xorl %eax, %eax
+; ADL-NEXT: vtestps %xmm0, %xmm0
+; ADL-NEXT: setne %al
+; ADL-NEXT: negl %eax
+; ADL-NEXT: retq
%1 = shufflevector <4 x float> %a0, <4 x float> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%2 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %1)
%3 = icmp ne i32 %2, 0
@@ -169,6 +224,15 @@ define i32 @movmskps_demanded_concat_v4f32(<4 x float> %a0, <4 x float> %a1) {
; CHECK-NEXT: negl %ecx
; CHECK-NEXT: sbbl %eax, %eax
; CHECK-NEXT: retq
+;
+; ADL-LABEL: movmskps_demanded_concat_v4f32:
+; ADL: # %bb.0:
+; ADL-NEXT: vmovmskps %xmm0, %ecx
+; ADL-NEXT: andl $3, %ecx
+; ADL-NEXT: xorl %eax, %eax
+; ADL-NEXT: negl %ecx
+; ADL-NEXT: sbbl %eax, %eax
+; ADL-NEXT: retq
%1 = shufflevector <4 x float> %a0, <4 x float> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%2 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %1)
%3 = and i32 %2, 3
diff --git a/llvm/test/CodeGen/X86/combine-movmsk.ll b/llvm/test/CodeGen/X86/combine-movmsk.ll
index d6105f5483ed3..b365a5fd13825 100644
--- a/llvm/test/CodeGen/X86/combine-movmsk.ll
+++ b/llvm/test/CodeGen/X86/combine-movmsk.ll
@@ -3,6 +3,7 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=alderlake | FileCheck %s --check-prefixes=ADL
declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>)
declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>)
@@ -27,6 +28,14 @@ define i1 @movmskps_noneof_bitcast_v2f64(<2 x double> %a0) {
; AVX-NEXT: vtestpd %xmm0, %xmm0
; AVX-NEXT: sete %al
; AVX-NEXT: retq
+;
+; ADL-LABEL: movmskps_noneof_bitcast_v2f64:
+; ADL: # %bb.0:
+; ADL-NEXT: vxorpd %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vcmpeqpd %xmm0, %xmm1, %xmm0
+; ADL-NEXT: vtestpd %xmm0, %xmm0
+; ADL-NEXT: sete %al
+; ADL-NEXT: retq
%1 = fcmp oeq <2 x double> zeroinitializer, %a0
%2 = sext <2 x i1> %1 to <2 x i64>
%3 = bitcast <2 x i64> %2 to <4 x float>
@@ -53,6 +62,15 @@ define i1 @movmskps_allof_bitcast_v2f64(<2 x double> %a0) {
; AVX-NEXT: vtestpd %xmm1, %xmm0
; AVX-NEXT: setb %al
; AVX-NEXT: retq
+;
+; ADL-LABEL: movmskps_allof_bitcast_v2f64:
+; ADL: # %bb.0:
+; ADL-NEXT: vxorpd %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vcmpeqpd %xmm0, %xmm1, %xmm0
+; ADL-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vtestpd %xmm1, %xmm0
+; ADL-NEXT: setb %al
+; ADL-NEXT: retq
%1 = fcmp oeq <2 x double> zeroinitializer, %a0
%2 = sext <2 x i1> %1 to <2 x i64>
%3 = bitcast <2 x i64> %2 to <4 x float>
@@ -82,6 +100,12 @@ define i1 @pmovmskb_noneof_bitcast_v2i64(<2 x i64> %a0) {
; AVX-NEXT: vtestpd %xmm0, %xmm0
; AVX-NEXT: sete %al
; AVX-NEXT: retq
+;
+; ADL-LABEL: pmovmskb_noneof_bitcast_v2i64:
+; ADL: # %bb.0:
+; ADL-NEXT: vtestpd %xmm0, %xmm0
+; ADL-NEXT: sete %al
+; ADL-NEXT: retq
%1 = icmp sgt <2 x i64> zeroinitializer, %a0
%2 = sext <2 x i1> %1 to <2 x i64>
%3 = bitcast <2 x i64> %2 to <16 x i8>
@@ -112,6 +136,13 @@ define i1 @pmovmskb_allof_bitcast_v2i64(<2 x i64> %a0) {
; AVX-NEXT: vtestpd %xmm1, %xmm0
; AVX-NEXT: setb %al
; AVX-NEXT: retq
+;
+; ADL-LABEL: pmovmskb_allof_bitcast_v2i64:
+; ADL: # %bb.0:
+; ADL-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vtestpd %xmm1, %xmm0
+; ADL-NEXT: setb %al
+; ADL-NEXT: retq
%1 = icmp sgt <2 x i64> zeroinitializer, %a0
%2 = sext <2 x i1> %1 to <2 x i64>
%3 = bitcast <2 x i64> %2 to <16 x i8>
@@ -137,6 +168,14 @@ define i1 @pmovmskb_noneof_bitcast_v4f32(<4 x float> %a0) {
; AVX-NEXT: vtestps %xmm0, %xmm0
; AVX-NEXT: sete %al
; AVX-NEXT: retq
+;
+; ADL-LABEL: pmovmskb_noneof_bitcast_v4f32:
+; ADL: # %bb.0:
+; ADL-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0
+; ADL-NEXT: vtestps %xmm0, %xmm0
+; ADL-NEXT: sete %al
+; ADL-NEXT: retq
%1 = fcmp oeq <4 x float> %a0, zeroinitializer
%2 = sext <4 x i1> %1 to <4 x i32>
%3 = bitcast <4 x i32> %2 to <16 x i8>
@@ -163,6 +202,15 @@ define i1 @pmovmskb_allof_bitcast_v4f32(<4 x float> %a0) {
; AVX-NEXT: vtestps %xmm1, %xmm0
; AVX-NEXT: setb %al
; AVX-NEXT: retq
+;
+; ADL-LABEL: pmovmskb_allof_bitcast_v4f32:
+; ADL: # %bb.0:
+; ADL-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0
+; ADL-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vtestps %xmm1, %xmm0
+; ADL-NEXT: setb %al
+; ADL-NEXT: retq
%1 = fcmp oeq <4 x float> %a0, zeroinitializer
%2 = sext <4 x i1> %1 to <4 x i32>
%3 = bitcast <4 x i32> %2 to <16 x i8>
@@ -188,6 +236,14 @@ define i1 @movmskps_allof_v4i32_positive(<4 x i32> %a0) {
; AVX-NEXT: cmpl $15, %eax
; AVX-NEXT: sete %al
; AVX-NEXT: retq
+;
+; ADL-LABEL: movmskps_allof_v4i32_positive:
+; ADL: # %bb.0:
+; ADL-NEXT: vmovmskps %xmm0, %eax
+; ADL-NEXT: xorl $15, %eax
+; ADL-NEXT: cmpl $15, %eax
+; ADL-NEXT: sete %al
+; ADL-NEXT: retq
%1 = icmp sgt <4 x i32> %a0, <i32 -1, i32 -1, i32 -1, i32 -1>
%2 = sext <4 x i1> %1 to <4 x i32>
%3 = bitcast <4 x i32> %2 to <4 x float>
@@ -210,6 +266,13 @@ define i1 @pmovmskb_noneof_v16i8_positive(<16 x i8> %a0) {
; AVX-NEXT: xorl $65535, %eax # imm = 0xFFFF
; AVX-NEXT: sete %al
; AVX-NEXT: retq
+;
+; ADL-LABEL: pmovmskb_noneof_v16i8_positive:
+; ADL: # %bb.0:
+; ADL-NEXT: vpmovmskb %xmm0, %eax
+; ADL-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; ADL-NEXT: sete %al
+; ADL-NEXT: retq
%1 = icmp sgt <16 x i8> %a0, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
%2 = sext <16 x i1> %1 to <16 x i8>
%3 = tail call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %2)
@@ -240,6 +303,12 @@ define i32 @movmskpd_pow2_mask(<2 x i64> %a0) {
; AVX-NEXT: vmovmskpd %xmm0, %eax
; AVX-NEXT: xorl $3, %eax
; AVX-NEXT: retq
+;
+; ADL-LABEL: movmskpd_pow2_mask:
+; ADL: # %bb.0:
+; ADL-NEXT: vmovmskpd %xmm0, %eax
+; ADL-NEXT: xorl $3, %eax
+; ADL-NEXT: retq
%1 = and <2 x i64> %a0, <i64 -9223372036854775808, i64 -9223372036854775808>
%2 = icmp eq <2 x i64> %1, zeroinitializer
%3 = sext <2 x i1> %2 to <2 x i64>
@@ -262,6 +331,13 @@ define i32 @movmskps_pow2_mask(<4 x i32> %a0) {
; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: xorl $15, %eax
; AVX-NEXT: retq
+;
+; ADL-LABEL: movmskps_pow2_mask:
+; ADL: # %bb.0:
+; ADL-NEXT: vpslld $29, %xmm0, %xmm0
+; ADL-NEXT: vmovmskps %xmm0, %eax
+; ADL-NEXT: xorl $15, %eax
+; ADL-NEXT: retq
%1 = and <4 x i32> %a0, <i32 4, i32 4, i32 4, i32 4>
%2 = icmp eq <4 x i32> %1, zeroinitializer
%3 = sext <4 x i1> %2 to <4 x i32>
@@ -284,6 +360,13 @@ define i32 @pmovmskb_pow2_mask(<16 x i8> %a0) {
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: xorl $65535, %eax # imm = 0xFFFF
; AVX-NEXT: retq
+;
+; ADL-LABEL: pmovmskb_pow2_mask:
+; ADL: # %bb.0:
+; ADL-NEXT: vpsllw $7, %xmm0, %xmm0
+; ADL-NEXT: vpmovmskb %xmm0, %eax
+; ADL-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; ADL-NEXT: retq
%1 = and <16 x i8> %a0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%2 = icmp eq <16 x i8> %1, zeroinitializer
%3 = sext <16 x i1> %2 to <16 x i8>
@@ -312,6 +395,14 @@ define i32 @and_movmskpd_movmskpd(<2 x double> %a0, <2 x i64> %a1) {
; AVX-NEXT: vandpd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskpd %xmm0, %eax
; AVX-NEXT: retq
+;
+; ADL-LABEL: and_movmskpd_movmskpd:
+; ADL: # %bb.0:
+; ADL-NEXT: vxorpd %xmm2, %xmm2, %xmm2
+; ADL-NEXT: vcmpeqpd %xmm0, %xmm2, %xmm0
+; ADL-NEXT: vandpd %xmm1, %xmm0, %xmm0
+; ADL-NEXT: vmovmskpd %xmm0, %eax
+; ADL-NEXT: retq
%1 = fcmp oeq <2 x double> zeroinitializer, %a0
%2 = sext <2 x i1> %1 to <2 x i64>
%3 = bitcast <2 x i64> %2 to <2 x double>
@@ -339,6 +430,14 @@ define i32 @xor_movmskps_movmskps(<4 x float> %a0, <4 x i32> %a1) {
; AVX-NEXT: vxorps %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: retq
+;
+; ADL-LABEL: xor_movmskps_movmskps:
+; ADL: # %bb.0:
+; ADL-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; ADL-NEXT: vcmpeqps %xmm0, %xmm2, %xmm0
+; ADL-NEXT: vxorps %xmm1, %xmm0, %xmm0
+; ADL-NEXT: vmovmskps %xmm0, %eax
+; ADL-NEXT: retq
%1 = fcmp oeq <4 x float> zeroinitializer, %a0
%2 = sext <4 x i1> %1 to <4 x i32>
%3 = bitcast <4 x i32> %2 to <4 x float>
@@ -368,6 +467,15 @@ define i32 @or_pmovmskb_pmovmskb(<16 x i8> %a0, <8 x i16> %a1) {
; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: retq
+;
+; ADL-LABEL: or_pmovmskb_pmovmskb:
+; ADL: # %bb.0:
+; ADL-NEXT: vpxor %xmm2, %xmm2, %xmm2
+; ADL-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
+; ADL-NEXT: vpsraw $15, %xmm1, %xmm1
+; ADL-NEXT: vpor %xmm1, %xmm0, %xmm0
+; ADL-NEXT: vpmovmskb %xmm0, %eax
+; ADL-NEXT: retq
%1 = icmp eq <16 x i8> zeroinitializer, %a0
%2 = sext <16 x i1> %1 to <16 x i8>
%3 = tail call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %2)
@@ -400,6 +508,16 @@ define i32 @movmskps_ptest_numelts_mismatch(<16 x i8> %a0) {
; AVX-NEXT: vtestps %xmm1, %xmm0
; AVX-NEXT: sbbl %eax, %eax
; AVX-NEXT: retq
+;
+; ADL-LABEL: movmskps_ptest_numelts_mismatch:
+; ADL: # %bb.0:
+; ADL-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; ADL-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
+; ADL-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; ADL-NEXT: xorl %eax, %eax
+; ADL-NEXT: vtestps %xmm1, %xmm0
+; ADL-NEXT: sbbl %eax, %eax
+; ADL-NEXT: retq
%1 = icmp eq <16 x i8> %a0, zeroinitializer
%2 = sext <16 x i1> %1 to <16 x i8>
%3 = bitcast <16 x i8> %2 to <4 x float>
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