[llvm] 03bc33c - Revert "[RISCV] Minor readability improvement to RISCVMatInt. NFC"
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 5 23:22:55 PDT 2023
Author: Craig Topper
Date: 2023-06-05T23:22:28-07:00
New Revision: 03bc33c809616df70047f5fe1a9ce7dffac43f52
URL: https://github.com/llvm/llvm-project/commit/03bc33c809616df70047f5fe1a9ce7dffac43f52
DIFF: https://github.com/llvm/llvm-project/commit/03bc33c809616df70047f5fe1a9ce7dffac43f52.diff
LOG: Revert "[RISCV] Minor readability improvement to RISCVMatInt. NFC"
This reverts commit 1ebe06017df607d4fc140f6b166e35cd32fc5f16.
I've been informed the old way was documented in the psABI.
Added:
Modified:
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
index f4e6c3db8ab63..95c8098829a65 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
@@ -65,8 +65,8 @@ static void generateInstSeqImpl(int64_t Val,
// v[0,12) != 0 && v[12,32) == 0 : ADDI
// v[0,12) == 0 && v[12,32) != 0 : LUI
// v[0,32) != 0 : LUI+ADDI(W)
+ int64_t Hi20 = ((Val + 0x800) >> 12) & 0xFFFFF;
int64_t Lo12 = SignExtend64<12>(Val);
- int64_t Hi20 = ((Val - Lo12) >> 12) & 0xFFFFF;
if (Hi20)
Res.emplace_back(RISCV::LUI, Hi20);
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