[llvm] 1ebe060 - [RISCV] Minor readability improvement to RISCVMatInt. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-06-05T23:07:35-07:00
New Revision: 1ebe06017df607d4fc140f6b166e35cd32fc5f16

URL: https://github.com/llvm/llvm-project/commit/1ebe06017df607d4fc140f6b166e35cd32fc5f16
DIFF: https://github.com/llvm/llvm-project/commit/1ebe06017df607d4fc140f6b166e35cd32fc5f16.diff

LOG: [RISCV] Minor readability improvement to RISCVMatInt. NFC

When splitting a simm32 into LUI+ADDI(W). Subtract Lo12 from Val
to calculate Hi20. This replaces the old method of adding 0x800 to
Val. This change makes the math the reverse of how the LUI+ADDI(W)
create the immediate.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
index 95c8098829a65..f4e6c3db8ab63 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
@@ -65,8 +65,8 @@ static void generateInstSeqImpl(int64_t Val,
     // v[0,12) != 0 && v[12,32) == 0 : ADDI
     // v[0,12) == 0 && v[12,32) != 0 : LUI
     // v[0,32) != 0                  : LUI+ADDI(W)
-    int64_t Hi20 = ((Val + 0x800) >> 12) & 0xFFFFF;
     int64_t Lo12 = SignExtend64<12>(Val);
+    int64_t Hi20 = ((Val - Lo12) >> 12) & 0xFFFFF;
 
     if (Hi20)
       Res.emplace_back(RISCV::LUI, Hi20);