[PATCH] D152221: Avoid cross-section branches in AArch64 inline asm

Daniel Hoekwater via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 5 18:17:11 PDT 2023


dhoekwater created this revision.
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Because inline assembly can define labels and branch to them,
placing basic blocks in a different section may cause the linker
to move the branch out of range when performing section layout.
If the branch is out of range, the binary can fail to link or worse,
the linker will try to relax the branch and clobber the X16 register.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D152221

Files:
  llvm/lib/CodeGen/BasicBlockSections.cpp
  llvm/lib/CodeGen/MachineFunctionSplitter.cpp


Index: llvm/lib/CodeGen/MachineFunctionSplitter.cpp
===================================================================
--- llvm/lib/CodeGen/MachineFunctionSplitter.cpp
+++ llvm/lib/CodeGen/MachineFunctionSplitter.cpp
@@ -115,6 +115,15 @@
   if (!UseProfileData && !SplitAllEHCode)
     return false;
 
+  // Blocks cannot be split to different sections on AArch64 if they contain
+  // inline assembly. This is because inline assembly may contain a jump to
+  // another block in a different text section, which the compiler can't
+  // guarantee is in-range of the branch instruction.
+  const auto &Triple = MF.getSubtarget().getTargetTriple();
+  assert(Triple.isX86() || Triple.isAArch64());
+  if (Triple.isAArch64() && MF.hasInlineAsm())
+    return false;
+
   // TODO: We don't split functions where a section attribute has been set
   // since the split part may not be placed in a contiguous region. It may also
   // be more beneficial to augment the linker to ensure contiguous layout of
Index: llvm/lib/CodeGen/BasicBlockSections.cpp
===================================================================
--- llvm/lib/CodeGen/BasicBlockSections.cpp
+++ llvm/lib/CodeGen/BasicBlockSections.cpp
@@ -318,9 +318,18 @@
   // clusters of basic blocks using basic block ids. Source drift can
   // invalidate these groupings leading to sub-optimal code generation with
   // regards to performance.
-  if (BBSectionsType == BasicBlockSection::List &&
-      hasInstrProfHashMismatch(MF))
+  if (BBSectionsType == BasicBlockSection::List && hasInstrProfHashMismatch(MF))
     return true;
+
+  // Blocks cannot be placed in different sections on AArch64 if they contain
+  // inline assembly. This is because inline assembly may contain a jump to
+  // another block in a different text section, which the compiler can't
+  // guarantee is in-range of the branch instruction.
+  const auto &Triple = MF.getSubtarget().getTargetTriple();
+  assert(Triple.isX86() || Triple.isAArch64());
+  if (Triple.isAArch64() && MF.hasInlineAsm())
+    return false;
+
   // Renumber blocks before sorting them. This is useful during sorting,
   // basic blocks in the same section will retain the default order.
   // This renumbering should also be done for basic block labels to match the


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