[llvm] a1422bf - DAG: Reorder conditions

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2023-06-05T18:44:17-04:00
New Revision: a1422bf90664007578d675f5d6abe2aa64eca037

URL: https://github.com/llvm/llvm-project/commit/a1422bf90664007578d675f5d6abe2aa64eca037
DIFF: https://github.com/llvm/llvm-project/commit/a1422bf90664007578d675f5d6abe2aa64eca037.diff

LOG: DAG: Reorder conditions

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 7d1eb2df0af68..54a25c4b19513 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -4431,8 +4431,8 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
   }
 
   // fold (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2)
-  if (DAG.isConstantIntBuildVectorOrConstantInt(N1) &&
-      N0.getOpcode() == ISD::ADD &&
+  if (N0.getOpcode() == ISD::ADD &&
+      DAG.isConstantIntBuildVectorOrConstantInt(N1) &&
       DAG.isConstantIntBuildVectorOrConstantInt(N0.getOperand(1)) &&
       isMulAddWithConstProfitable(N, N0, N1))
     return DAG.getNode(