[llvm] c422478 - [RISCV] Rename SDT_RISCVVWBinOpW_VL->SDT_RISCVVWIntBinOpW_VL. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-06-05T14:12:47-07:00
New Revision: c4224782cd266782508232b27e2e3f32844936f7

URL: https://github.com/llvm/llvm-project/commit/c4224782cd266782508232b27e2e3f32844936f7
DIFF: https://github.com/llvm/llvm-project/commit/c4224782cd266782508232b27e2e3f32844936f7.diff

LOG: [RISCV] Rename SDT_RISCVVWBinOpW_VL->SDT_RISCVVWIntBinOpW_VL. NFC

Preparation for D151969 which adds an FP version.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
index df89a3b9b7925..056c5ce61bbd7 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
@@ -412,19 +412,19 @@ def SDT_RISCVVNIntBinOp_VL : SDTypeProfile<1, 5, [SDTCisVec<0>, SDTCisInt<0>,
                                                   SDTCisVT<5, XLenVT>]>;
 def riscv_vnsrl_vl : SDNode<"RISCVISD::VNSRL_VL", SDT_RISCVVNIntBinOp_VL>;
 
-def SDT_RISCVVWBinOpW_VL : SDTypeProfile<1, 5, [SDTCisVec<0>, SDTCisInt<0>,
-                                                SDTCisSameAs<0, 1>,
-                                                SDTCisInt<2>,
-                                                SDTCisSameNumEltsAs<1, 2>,
-                                                SDTCisOpSmallerThanOp<2, 1>,
-                                                SDTCisSameAs<0, 3>,
-                                                SDTCisSameNumEltsAs<1, 4>,
-                                                SDTCVecEltisVT<4, i1>,
-                                                SDTCisVT<5, XLenVT>]>;
-def riscv_vwadd_w_vl :  SDNode<"RISCVISD::VWADD_W_VL",  SDT_RISCVVWBinOpW_VL>;
-def riscv_vwaddu_w_vl : SDNode<"RISCVISD::VWADDU_W_VL", SDT_RISCVVWBinOpW_VL>;
-def riscv_vwsub_w_vl :  SDNode<"RISCVISD::VWSUB_W_VL",  SDT_RISCVVWBinOpW_VL>;
-def riscv_vwsubu_w_vl : SDNode<"RISCVISD::VWSUBU_W_VL", SDT_RISCVVWBinOpW_VL>;
+def SDT_RISCVVWIntBinOpW_VL : SDTypeProfile<1, 5, [SDTCisVec<0>, SDTCisInt<0>,
+                                                   SDTCisSameAs<0, 1>,
+                                                   SDTCisInt<2>,
+                                                   SDTCisSameNumEltsAs<1, 2>,
+                                                   SDTCisOpSmallerThanOp<2, 1>,
+                                                   SDTCisSameAs<0, 3>,
+                                                   SDTCisSameNumEltsAs<1, 4>,
+                                                   SDTCVecEltisVT<4, i1>,
+                                                   SDTCisVT<5, XLenVT>]>;
+def riscv_vwadd_w_vl :  SDNode<"RISCVISD::VWADD_W_VL",  SDT_RISCVVWIntBinOpW_VL>;
+def riscv_vwaddu_w_vl : SDNode<"RISCVISD::VWADDU_W_VL", SDT_RISCVVWIntBinOpW_VL>;
+def riscv_vwsub_w_vl :  SDNode<"RISCVISD::VWSUB_W_VL",  SDT_RISCVVWIntBinOpW_VL>;
+def riscv_vwsubu_w_vl : SDNode<"RISCVISD::VWSUBU_W_VL", SDT_RISCVVWIntBinOpW_VL>;
 
 def SDTRVVVecReduce : SDTypeProfile<1, 6, [
   SDTCisVec<0>, SDTCisVec<1>, SDTCisVec<2>, SDTCisSameAs<0, 3>,