[PATCH] D151916: [DAG] Peek through any trunc/zext when combining select into shifts.

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix updated this revision to Diff 528460.
deadalnix added a comment.

Rebase on top of an NFC that moves `isTruncateOf`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151916/new/

https://reviews.llvm.org/D151916

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2480,6 +2480,22 @@
   if (Sel.getOpcode() != ISD::SELECT || !Sel.hasOneUse()) {
     SelOpNo = 1;
     Sel = BO->getOperand(1);
+
+    // Peek through any trunc/zext to shift amount type.
+    if ((BinOpcode == ISD::SHL || BinOpcode == ISD::SRA ||
+         BinOpcode == ISD::SRL) && Sel.hasOneUse()) {
+      // This is valid when the truncated bits of x are already zero.
+      SDValue Op;
+      KnownBits Known;
+      if (isTruncateOf(DAG, Sel, Op, Known)) {
+        APInt TruncatedBits =
+          APInt::getBitsSet(Op.getScalarValueSizeInBits(),
+                            Sel.getScalarValueSizeInBits(),
+                            Op.getScalarValueSizeInBits());
+        if (TruncatedBits.isSubsetOf(Known.Zero))
+          Sel = Op;
+      }
+    }
   }
 
   if (Sel.getOpcode() != ISD::SELECT || !Sel.hasOneUse())


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