[llvm] 79115ae - [LoopUnroll] Add test for SCEV invalidation issue (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 5 08:28:43 PDT 2023
Author: Nikita Popov
Date: 2023-06-05T17:28:32+02:00
New Revision: 79115aebb759eb1ef8cdcc35f228d88f70c7bfc2
URL: https://github.com/llvm/llvm-project/commit/79115aebb759eb1ef8cdcc35f228d88f70c7bfc2
DIFF: https://github.com/llvm/llvm-project/commit/79115aebb759eb1ef8cdcc35f228d88f70c7bfc2.diff
LOG: [LoopUnroll] Add test for SCEV invalidation issue (NFC)
Test for the issue reported at https://reviews.llvm.org/D149331#4387931.
Added:
llvm/test/Transforms/LoopUnroll/scev-invalidation-lcssa.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopUnroll/scev-invalidation-lcssa.ll b/llvm/test/Transforms/LoopUnroll/scev-invalidation-lcssa.ll
new file mode 100644
index 0000000000000..c8cb54ae127ed
--- /dev/null
+++ b/llvm/test/Transforms/LoopUnroll/scev-invalidation-lcssa.ll
@@ -0,0 +1,104 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
+; RUN: opt -S -passes='print<scalar-evolution>,loop-unroll' -unroll-runtime < %s 2>/dev/null | FileCheck %s
+
+define i32 @f(i1 %cond1) #0 !prof !0 {
+; CHECK-LABEL: define i32 @f
+; CHECK-SAME: (i1 [[COND1:%.*]]) !prof [[PROF0:![0-9]+]] {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP1_PEEL_BEGIN:%.*]]
+; CHECK: loop1.peel.begin:
+; CHECK-NEXT: br label [[LOOP1_PEEL:%.*]]
+; CHECK: loop1.peel:
+; CHECK-NEXT: [[LD_PEEL:%.*]] = load i64, ptr null, align 8
+; CHECK-NEXT: br i1 [[COND1]], label [[LOOP1_PEEL_NEXT:%.*]], label [[EXIT1:%.*]], !prof [[PROF1:![0-9]+]]
+; CHECK: loop1.peel.next:
+; CHECK-NEXT: br label [[LOOP1_PEEL_NEXT1:%.*]]
+; CHECK: loop1.peel.next1:
+; CHECK-NEXT: br label [[ENTRY_PEEL_NEWPH:%.*]]
+; CHECK: entry.peel.newph:
+; CHECK-NEXT: br label [[LOOP1:%.*]]
+; CHECK: loop1:
+; CHECK-NEXT: [[LD:%.*]] = load i64, ptr null, align 8
+; CHECK-NEXT: br i1 [[COND1]], label [[LOOP1]], label [[EXIT1_LOOPEXIT:%.*]], !prof [[PROF2:![0-9]+]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: exit1.loopexit:
+; CHECK-NEXT: [[LD_LCSSA_PH:%.*]] = phi i64 [ [[LD]], [[LOOP1]] ]
+; CHECK-NEXT: br label [[EXIT1]]
+; CHECK: exit1:
+; CHECK-NEXT: [[LD_LCSSA:%.*]] = phi i64 [ [[LD_PEEL]], [[LOOP1_PEEL]] ], [ [[LD_LCSSA_PH]], [[EXIT1_LOOPEXIT]] ]
+; CHECK-NEXT: br label [[ENTRY2:%.*]]
+; CHECK: entry2:
+; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[LD_LCSSA]], 1
+; CHECK-NEXT: [[XTRAITER:%.*]] = and i64 [[TMP0]], 7
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[LD_LCSSA]], 7
+; CHECK-NEXT: br i1 [[TMP1]], label [[EXIT2_UNR_LCSSA:%.*]], label [[ENTRY2_NEW:%.*]]
+; CHECK: entry2.new:
+; CHECK-NEXT: [[UNROLL_ITER:%.*]] = sub i64 [[TMP0]], [[XTRAITER]]
+; CHECK-NEXT: br label [[LOOP2:%.*]]
+; CHECK: loop2:
+; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ 0, [[ENTRY2_NEW]] ], [ [[INC_7:%.*]], [[LOOP2]] ]
+; CHECK-NEXT: [[NITER:%.*]] = phi i64 [ 0, [[ENTRY2_NEW]] ], [ [[NITER_NEXT_7:%.*]], [[LOOP2]] ]
+; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i64 [[PHI]], 1
+; CHECK-NEXT: [[NITER_NEXT:%.*]] = add nuw nsw i64 [[NITER]], 1
+; CHECK-NEXT: [[INC_1:%.*]] = add nuw nsw i64 [[INC]], 1
+; CHECK-NEXT: [[NITER_NEXT_1:%.*]] = add nuw nsw i64 [[NITER_NEXT]], 1
+; CHECK-NEXT: [[INC_2:%.*]] = add nuw nsw i64 [[INC_1]], 1
+; CHECK-NEXT: [[NITER_NEXT_2:%.*]] = add nuw nsw i64 [[NITER_NEXT_1]], 1
+; CHECK-NEXT: [[INC_3:%.*]] = add nuw nsw i64 [[INC_2]], 1
+; CHECK-NEXT: [[NITER_NEXT_3:%.*]] = add nuw nsw i64 [[NITER_NEXT_2]], 1
+; CHECK-NEXT: [[INC_4:%.*]] = add nuw nsw i64 [[INC_3]], 1
+; CHECK-NEXT: [[NITER_NEXT_4:%.*]] = add nuw nsw i64 [[NITER_NEXT_3]], 1
+; CHECK-NEXT: [[INC_5:%.*]] = add nuw nsw i64 [[INC_4]], 1
+; CHECK-NEXT: [[NITER_NEXT_5:%.*]] = add nuw nsw i64 [[NITER_NEXT_4]], 1
+; CHECK-NEXT: [[INC_6:%.*]] = add nuw nsw i64 [[INC_5]], 1
+; CHECK-NEXT: [[NITER_NEXT_6:%.*]] = add nuw nsw i64 [[NITER_NEXT_5]], 1
+; CHECK-NEXT: [[INC_7]] = add i64 [[INC_6]], 1
+; CHECK-NEXT: [[NITER_NEXT_7]] = add i64 [[NITER_NEXT_6]], 1
+; CHECK-NEXT: [[NITER_NCMP_7:%.*]] = icmp eq i64 [[NITER_NEXT_7]], [[UNROLL_ITER]]
+; CHECK-NEXT: br i1 [[NITER_NCMP_7]], label [[EXIT2_UNR_LCSSA_LOOPEXIT:%.*]], label [[LOOP2]]
+; CHECK: exit2.unr-lcssa.loopexit:
+; CHECK-NEXT: [[PHI_UNR_PH:%.*]] = phi i64 [ [[INC_7]], [[LOOP2]] ]
+; CHECK-NEXT: br label [[EXIT2_UNR_LCSSA]]
+; CHECK: exit2.unr-lcssa:
+; CHECK-NEXT: [[PHI_UNR:%.*]] = phi i64 [ 0, [[ENTRY2]] ], [ [[PHI_UNR_PH]], [[EXIT2_UNR_LCSSA_LOOPEXIT]] ]
+; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp ne i64 [[XTRAITER]], 0
+; CHECK-NEXT: br i1 [[LCMP_MOD]], label [[LOOP2_EPIL_PREHEADER:%.*]], label [[EXIT2:%.*]]
+; CHECK: loop2.epil.preheader:
+; CHECK-NEXT: br label [[LOOP2_EPIL:%.*]]
+; CHECK: loop2.epil:
+; CHECK-NEXT: [[PHI_EPIL:%.*]] = phi i64 [ [[PHI_UNR]], [[LOOP2_EPIL_PREHEADER]] ], [ [[INC_EPIL:%.*]], [[LOOP2_EPIL]] ]
+; CHECK-NEXT: [[EPIL_ITER:%.*]] = phi i64 [ 0, [[LOOP2_EPIL_PREHEADER]] ], [ [[EPIL_ITER_NEXT:%.*]], [[LOOP2_EPIL]] ]
+; CHECK-NEXT: [[INC_EPIL]] = add i64 [[PHI_EPIL]], 1
+; CHECK-NEXT: [[COND2_EPIL:%.*]] = icmp eq i64 [[LD_LCSSA]], [[PHI_EPIL]]
+; CHECK-NEXT: [[EPIL_ITER_NEXT]] = add i64 [[EPIL_ITER]], 1
+; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i64 [[EPIL_ITER_NEXT]], [[XTRAITER]]
+; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label [[LOOP2_EPIL]], label [[EXIT2_EPILOG_LCSSA:%.*]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK: exit2.epilog-lcssa:
+; CHECK-NEXT: br label [[EXIT2]]
+; CHECK: exit2:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ br label %loop1
+
+loop1:
+ %ld = load i64, ptr null, align 8
+ br i1 %cond1, label %loop1, label %exit1, !prof !1
+
+exit1:
+ br label %entry2
+
+entry2:
+ br label %loop2
+
+loop2:
+ %phi = phi i64 [ 0, %entry2 ], [ %inc, %loop2 ]
+ %inc = add i64 %phi, 1
+ %cond2 = icmp eq i64 %ld, %phi
+ br i1 %cond2, label %exit2, label %loop2
+
+exit2:
+ ret i32 0
+}
+
+!0 = !{!"function_entry_count", i64 1}
+!1 = !{!"branch_weights", i32 123, i32 472}
More information about the llvm-commits
mailing list