[llvm] 9ad1a48 - [AMDGPU][AsmParser][NFC] Immediate operand classes to derive from custom operands.
Ivan Kosarev via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 5 04:56:28 PDT 2023
Author: Ivan Kosarev
Date: 2023-06-05T12:40:44+01:00
New Revision: 9ad1a48ad77b11a1603ecede65d8a9f6bc6f1a15
URL: https://github.com/llvm/llvm-project/commit/9ad1a48ad77b11a1603ecede65d8a9f6bc6f1a15
DIFF: https://github.com/llvm/llvm-project/commit/9ad1a48ad77b11a1603ecede65d8a9f6bc6f1a15.diff
LOG: [AMDGPU][AsmParser][NFC] Immediate operand classes to derive from custom operands.
Removes unnecessary duplication in TableGen definitions.
Part of <https://github.com/llvm/llvm-project/issues/62629>.
Reviewed By: dp
Differential Revision: https://reviews.llvm.org/D151684
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
llvm/lib/Target/AMDGPU/SIInstrInfo.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
index a7a87e866c9b8..c74728a9fb578 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
@@ -123,20 +123,35 @@ def FMA : Predicate<"Subtarget->hasFMA()">;
def InstFlag : OperandWithDefaultOps <i32, (ops (i32 0))>;
-class ImmOperandClass<string name, bit optional> : AsmOperandClass {
+class CustomOperandClass<string name, bit optional> : AsmOperandClass {
let Name = name;
let PredicateMethod = "is"#name;
- let ParserMethod = "";
+ let ParserMethod = "parse"#name;
let RenderMethod = "addImmOperands";
let IsOptional = optional;
let DefaultMethod = "default"#name;
}
+class CustomOperandProps<bit optional = 0, string name = NAME,
+ AsmOperandClass opClass = CustomOperandClass<name, optional>> {
+ string PrintMethod = "print"#name;
+ AsmOperandClass ParserMatchClass = opClass;
+ string OperandType = "OPERAND_IMMEDIATE";
+}
+
+class CustomOperand<ValueType type, bit optional = 0, string name = NAME,
+ AsmOperandClass opClass = CustomOperandClass<name, optional>>
+ : Operand<type>, CustomOperandProps<optional, name, opClass>;
+
+class ImmOperandClass<string name, bit optional>
+ : CustomOperandClass<name, optional> {
+ let ParserMethod = "";
+}
+
class ImmOperand<ValueType type, string name, bit optional = 0,
- string printer = "print"#name> : Operand<type> {
- let ParserMatchClass = ImmOperandClass<name, optional>;
+ string printer = "print"#name>
+ : CustomOperand<type, optional, name, ImmOperandClass<name, optional>> {
let PrintMethod = printer;
- let OperandType = "OPERAND_IMMEDIATE";
}
def s16imm : ImmOperand<i16, "S16Imm", 0, "printU16ImmOperand">;
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index dfb0b74ef320b..77dad7e4e64da 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -1121,26 +1121,6 @@ def SDWAVopcDst : BoolRC {
let PrintMethod = "printVOPDst";
}
-class CustomOperandClass<string CName, bit Optional> : AsmOperandClass {
- let Name = CName;
- let PredicateMethod = "is"#CName;
- let ParserMethod = "parse"#CName;
- let RenderMethod = "addImmOperands";
- let IsOptional = Optional;
- let DefaultMethod = "default"#CName;
-}
-
-class CustomOperandProps<bit Optional = 0, string Name = NAME,
- AsmOperandClass Class = CustomOperandClass<Name, Optional>> {
- string PrintMethod = "print"#Name;
- AsmOperandClass ParserMatchClass = Class;
- string OperandType = "OPERAND_IMMEDIATE";
-}
-
-class CustomOperand<ValueType Type, bit Optional = 0, string Name = NAME,
- AsmOperandClass Class = CustomOperandClass<Name, Optional>>
- : Operand<Type>, CustomOperandProps<Optional, Name, Class>;
-
class NamedIntOperandClass<string Prefix, string Name, string ConvertMethod>
: CustomOperandClass<Name, 1> {
string ImmTy = "AMDGPUOperand::ImmTy"#Name;
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