[PATCH] D152129: [AVR][NFC][test] Supplement more tests of 8-bit rotation
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 5 01:43:59 PDT 2023
benshi001 created this revision.
benshi001 added reviewers: aykevl, Patryk27, jacquesguan.
Herald added subscribers: Jim, dylanmckay.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D152129
Files:
llvm/test/CodeGen/AVR/rotate.ll
Index: llvm/test/CodeGen/AVR/rotate.ll
===================================================================
--- llvm/test/CodeGen/AVR/rotate.ll
+++ llvm/test/CodeGen/AVR/rotate.ll
@@ -27,19 +27,38 @@
ret i8 %0
}
+define i8 @rotl8_5(i8 %x) {
+; CHECK-LABEL: rotl8_5:
+; CHECK: ; %bb.0: ; %start
+; CHECK-NEXT: lsl r24
+; CHECK-NEXT: adc r24, r1
+; CHECK-NEXT: lsl r24
+; CHECK-NEXT: adc r24, r1
+; CHECK-NEXT: lsl r24
+; CHECK-NEXT: adc r24, r1
+; CHECK-NEXT: lsl r24
+; CHECK-NEXT: adc r24, r1
+; CHECK-NEXT: lsl r24
+; CHECK-NEXT: adc r24, r1
+; CHECK-NEXT: ret
+start:
+ %0 = call i8 @llvm.fshl.i8(i8 %x, i8 %x, i8 5)
+ ret i8 %0
+}
+
define i8 @rotl8_dyn(i8 %x, i8 %y) {
; CHECK-LABEL: rotl8_dyn:
; CHECK: ; %bb.0: ; %start
; CHECK-NEXT: andi r22, 7
; CHECK-NEXT: dec r22
-; CHECK-NEXT: brmi .LBB2_2
-; CHECK-NEXT: .LBB2_1: ; %start
+; CHECK-NEXT: brmi .LBB3_2
+; CHECK-NEXT: .LBB3_1: ; %start
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
; CHECK-NEXT: lsl r24
; CHECK-NEXT: adc r24, r1
; CHECK-NEXT: dec r22
-; CHECK-NEXT: brpl .LBB2_1
-; CHECK-NEXT: .LBB2_2: ; %start
+; CHECK-NEXT: brpl .LBB3_1
+; CHECK-NEXT: .LBB3_2: ; %start
; CHECK-NEXT: ret
start:
%0 = call i8 @llvm.fshl.i8(i8 %x, i8 %x, i8 %y)
@@ -76,20 +95,44 @@
ret i8 %0
}
+define i8 @rotr8_5(i8 %x) {
+; CHECK-LABEL: rotr8_5:
+; CHECK: ; %bb.0: ; %start
+; CHECK-NEXT: bst r24, 0
+; CHECK-NEXT: ror r24
+; CHECK-NEXT: bld r24, 7
+; CHECK-NEXT: bst r24, 0
+; CHECK-NEXT: ror r24
+; CHECK-NEXT: bld r24, 7
+; CHECK-NEXT: bst r24, 0
+; CHECK-NEXT: ror r24
+; CHECK-NEXT: bld r24, 7
+; CHECK-NEXT: bst r24, 0
+; CHECK-NEXT: ror r24
+; CHECK-NEXT: bld r24, 7
+; CHECK-NEXT: bst r24, 0
+; CHECK-NEXT: ror r24
+; CHECK-NEXT: bld r24, 7
+; CHECK-NEXT: ret
+start:
+ %0 = call i8 @llvm.fshr.i8(i8 %x, i8 %x, i8 5)
+ ret i8 %0
+}
+
define i8 @rotr8_dyn(i8 %x, i8 %y) {
; CHECK-LABEL: rotr8_dyn:
; CHECK: ; %bb.0: ; %start
; CHECK-NEXT: andi r22, 7
; CHECK-NEXT: dec r22
-; CHECK-NEXT: brmi .LBB5_2
-; CHECK-NEXT: .LBB5_1: ; %start
+; CHECK-NEXT: brmi .LBB7_2
+; CHECK-NEXT: .LBB7_1: ; %start
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
; CHECK-NEXT: bst r24, 0
; CHECK-NEXT: ror r24
; CHECK-NEXT: bld r24, 7
; CHECK-NEXT: dec r22
-; CHECK-NEXT: brpl .LBB5_1
-; CHECK-NEXT: .LBB5_2: ; %start
+; CHECK-NEXT: brpl .LBB7_1
+; CHECK-NEXT: .LBB7_2: ; %start
; CHECK-NEXT: ret
start:
%0 = call i8 @llvm.fshr.i8(i8 %x, i8 %x, i8 %y)
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