[PATCH] D150956: [AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for ld1/ldnt1/st1/stnt1

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen created this revision.
sdesmalen added reviewers: CarolineConcatto, david-arm, thopre.
Herald added subscribers: hiraditya, kristof.beyls, tschuett.
Herald added a project: All.
sdesmalen requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

These intrinsics are used to implement multi-vector load/store intrinsics that loads
or stores a tuple of 2 or 4 values, based on a predicate-as-counter operand, e.g.

  __attribute__((arm_streaming))
  svuint8x2_t svld1[_u8]_x2(svcount_t png, const uint8_t *rn);
  
  __attribute__((arm_streaming))
  void svst1[_u8_x2](svcount_t png, uint8_t *rn, svuint8x2_t zt);

As described in https://github.com/ARM-software/acle/pull/217


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150956

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/sve2p1-intrinsics-loads.ll
  llvm/test/CodeGen/AArch64/sve2p1-intrinsics-stores.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D150956.523718.patch
Type: text/x-patch
Size: 93516 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230519/a8b1780b/attachment.bin>