[llvm] b42ee1d - InstSimplify: Pass AssumptionCache through more isKnownNeverNaN queries
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu May 18 16:48:12 PDT 2023
Author: Matt Arsenault
Date: 2023-05-19T00:48:03+01:00
New Revision: b42ee1d6c35a63a2df4ce0a5f4f0fe00c6cdfc56
URL: https://github.com/llvm/llvm-project/commit/b42ee1d6c35a63a2df4ce0a5f4f0fe00c6cdfc56
DIFF: https://github.com/llvm/llvm-project/commit/b42ee1d6c35a63a2df4ce0a5f4f0fe00c6cdfc56.diff
LOG: InstSimplify: Pass AssumptionCache through more isKnownNeverNaN queries
Added:
Modified:
llvm/lib/Analysis/InstructionSimplify.cpp
llvm/test/Transforms/InstSimplify/logic-of-fcmps.ll
Removed:
################################################################################
diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index 18ff4f381edb..ec3edcbd415e 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -1949,14 +1949,16 @@ static Value *simplifyOrOfICmps(ICmpInst *Op0, ICmpInst *Op1,
return nullptr;
}
-static Value *simplifyAndOrOfFCmps(const DataLayout &DL,
- const TargetLibraryInfo *TLI, FCmpInst *LHS,
+static Value *simplifyAndOrOfFCmps(const SimplifyQuery &Q, FCmpInst *LHS,
FCmpInst *RHS, bool IsAnd) {
Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1);
Value *RHS0 = RHS->getOperand(0), *RHS1 = RHS->getOperand(1);
if (LHS0->getType() != RHS0->getType())
return nullptr;
+ const DataLayout &DL = Q.DL;
+ const TargetLibraryInfo *TLI = Q.TLI;
+
FCmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate();
if ((PredL == FCmpInst::FCMP_ORD && PredR == FCmpInst::FCMP_ORD && IsAnd) ||
(PredL == FCmpInst::FCMP_UNO && PredR == FCmpInst::FCMP_UNO && !IsAnd)) {
@@ -1968,8 +1970,10 @@ static Value *simplifyAndOrOfFCmps(const DataLayout &DL,
// (fcmp uno NNAN, X) | (fcmp uno Y, X) --> fcmp uno Y, X
// (fcmp uno X, NNAN) | (fcmp uno X, Y) --> fcmp uno X, Y
// (fcmp uno X, NNAN) | (fcmp uno Y, X) --> fcmp uno Y, X
- if (((LHS1 == RHS0 || LHS1 == RHS1) && isKnownNeverNaN(LHS0, DL, TLI)) ||
- ((LHS0 == RHS0 || LHS0 == RHS1) && isKnownNeverNaN(LHS1, DL, TLI)))
+ if (((LHS1 == RHS0 || LHS1 == RHS1) &&
+ isKnownNeverNaN(LHS0, DL, TLI, 0, Q.AC, Q.CxtI, Q.DT)) ||
+ ((LHS0 == RHS0 || LHS0 == RHS1) &&
+ isKnownNeverNaN(LHS1, DL, TLI, 0, Q.AC, Q.CxtI, Q.DT)))
return RHS;
// (fcmp ord X, Y) & (fcmp ord NNAN, X) --> fcmp ord X, Y
@@ -1980,8 +1984,10 @@ static Value *simplifyAndOrOfFCmps(const DataLayout &DL,
// (fcmp uno Y, X) | (fcmp uno NNAN, X) --> fcmp uno Y, X
// (fcmp uno X, Y) | (fcmp uno X, NNAN) --> fcmp uno X, Y
// (fcmp uno Y, X) | (fcmp uno X, NNAN) --> fcmp uno Y, X
- if (((RHS1 == LHS0 || RHS1 == LHS1) && isKnownNeverNaN(RHS0, DL, TLI)) ||
- ((RHS0 == LHS0 || RHS0 == LHS1) && isKnownNeverNaN(RHS1, DL, TLI)))
+ if (((RHS1 == LHS0 || RHS1 == LHS1) &&
+ isKnownNeverNaN(RHS0, DL, TLI, 0, Q.AC, Q.CxtI, Q.DT)) ||
+ ((RHS0 == LHS0 || RHS0 == LHS1) &&
+ isKnownNeverNaN(RHS1, DL, TLI, 0, Q.AC, Q.CxtI, Q.DT)))
return LHS;
}
@@ -2009,7 +2015,7 @@ static Value *simplifyAndOrOfCmps(const SimplifyQuery &Q, Value *Op0,
auto *FCmp0 = dyn_cast<FCmpInst>(Op0);
auto *FCmp1 = dyn_cast<FCmpInst>(Op1);
if (FCmp0 && FCmp1)
- V = simplifyAndOrOfFCmps(Q.DL, Q.TLI, FCmp0, FCmp1, IsAnd);
+ V = simplifyAndOrOfFCmps(Q, FCmp0, FCmp1, IsAnd);
if (!V)
return nullptr;
diff --git a/llvm/test/Transforms/InstSimplify/logic-of-fcmps.ll b/llvm/test/Transforms/InstSimplify/logic-of-fcmps.ll
index 5851ba51753d..d898df0b32f2 100644
--- a/llvm/test/Transforms/InstSimplify/logic-of-fcmps.ll
+++ b/llvm/test/Transforms/InstSimplify/logic-of-fcmps.ll
@@ -4,6 +4,9 @@
; Cycle through commuted variants where one operand of fcmp ord/uno is
; known not-a-NAN and the other is repeated in the logically-connected fcmp.
+declare float @llvm.fabs.f32(float)
+declare void @llvm.assume(i1 noundef)
+
define i1 @ord1(float %x, float %y) {
; CHECK-LABEL: @ord1(
; CHECK-NEXT: [[CMP2:%.*]] = fcmp ord float [[X:%.*]], [[Y:%.*]]
@@ -15,6 +18,21 @@ define i1 @ord1(float %x, float %y) {
ret i1 %r
}
+define i1 @ord1_assume(float %x, float %y, float %not.nan) {
+; CHECK-LABEL: @ord1_assume(
+; CHECK-NEXT: [[ORD:%.*]] = fcmp ord float [[NOT_NAN:%.*]], 0.000000e+00
+; CHECK-NEXT: call void @llvm.assume(i1 [[ORD]])
+; CHECK-NEXT: [[CMP2:%.*]] = fcmp ord float [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
+;
+ %ord = fcmp ord float %not.nan, 0.0
+ call void @llvm.assume(i1 %ord)
+ %cmp1 = fcmp ord float %not.nan, %x
+ %cmp2 = fcmp ord float %x, %y
+ %r = and i1 %cmp1, %cmp2
+ ret i1 %r
+}
+
define i1 @ord2(double %x, double %y) {
; CHECK-LABEL: @ord2(
; CHECK-NEXT: [[CMP2:%.*]] = fcmp ord double [[Y:%.*]], [[X:%.*]]
@@ -37,6 +55,21 @@ define <2 x i1> @ord3(<2 x float> %x, <2 x float> %y) {
ret <2 x i1> %r
}
+define i1 @ord3_assume(float %x, float %y, float %not.nan) {
+; CHECK-LABEL: @ord3_assume(
+; CHECK-NEXT: [[ORD:%.*]] = fcmp ord float [[NOT_NAN:%.*]], 0.000000e+00
+; CHECK-NEXT: call void @llvm.assume(i1 [[ORD]])
+; CHECK-NEXT: [[CMP2:%.*]] = fcmp ord float [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
+;
+ %ord = fcmp ord float %not.nan, 0.0
+ call void @llvm.assume(i1 %ord)
+ %cmp1 = fcmp ord float %x, %not.nan
+ %cmp2 = fcmp ord float %x, %y
+ %r = and i1 %cmp1, %cmp2
+ ret i1 %r
+}
+
define <2 x i1> @ord4(<2 x double> %x, <2 x double> %y) {
; CHECK-LABEL: @ord4(
; CHECK-NEXT: [[CMP2:%.*]] = fcmp ord <2 x double> [[Y:%.*]], [[X:%.*]]
@@ -60,6 +93,21 @@ define i1 @ord5(float %x, float %y) {
ret i1 %r
}
+define i1 @ord5_assume(float %x, float %y, float %nnan) {
+; CHECK-LABEL: @ord5_assume(
+; CHECK-NEXT: [[ORD:%.*]] = fcmp ord float [[NNAN:%.*]], 0.000000e+00
+; CHECK-NEXT: call void @llvm.assume(i1 [[ORD]])
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord float [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %ord = fcmp ord float %nnan, 0.0
+ call void @llvm.assume(i1 %ord)
+ %cmp1 = fcmp ord float %x, %y
+ %cmp2 = fcmp ord float %nnan, %x
+ %r = and i1 %cmp1, %cmp2
+ ret i1 %r
+}
+
define i1 @ord6(double %x, double %y) {
; CHECK-LABEL: @ord6(
; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[Y:%.*]], [[X:%.*]]
@@ -71,6 +119,21 @@ define i1 @ord6(double %x, double %y) {
ret i1 %r
}
+define i1 @ord6_assume(double %x, double %y, double %not.nan) {
+; CHECK-LABEL: @ord6_assume(
+; CHECK-NEXT: [[ORD:%.*]] = fcmp ord double [[NOT_NAN:%.*]], 0.000000e+00
+; CHECK-NEXT: call void @llvm.assume(i1 [[ORD]])
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %ord = fcmp ord double %not.nan, 0.0
+ call void @llvm.assume(i1 %ord)
+ %cmp1 = fcmp ord double %y, %x
+ %cmp2 = fcmp ord double %not.nan, %x
+ %r = and i1 %cmp1, %cmp2
+ ret i1 %r
+}
+
define <2 x i1> @ord7(<2 x float> %x, <2 x float> %y) {
; CHECK-LABEL: @ord7(
; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord <2 x float> [[X:%.*]], [[Y:%.*]]
@@ -82,6 +145,21 @@ define <2 x i1> @ord7(<2 x float> %x, <2 x float> %y) {
ret <2 x i1> %r
}
+define i1 @ord7_assume(float %x, float %y, float %not.nan) {
+; CHECK-LABEL: @ord7_assume(
+; CHECK-NEXT: [[ORD:%.*]] = fcmp ord float [[NOT_NAN:%.*]], 0.000000e+00
+; CHECK-NEXT: call void @llvm.assume(i1 [[ORD]])
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord float [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %ord = fcmp ord float %not.nan, 0.0
+ call void @llvm.assume(i1 %ord)
+ %cmp1 = fcmp ord float %x, %y
+ %cmp2 = fcmp ord float %x, %not.nan
+ %r = and i1 %cmp1, %cmp2
+ ret i1 %r
+}
+
define <2 x i1> @ord8(<2 x double> %x, <2 x double> %y) {
; CHECK-LABEL: @ord8(
; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord <2 x double> [[Y:%.*]], [[X:%.*]]
@@ -181,4 +259,3 @@ define <2 x i1> @uno8(<2 x double> %x, <2 x double> %y) {
%r = or <2 x i1> %cmp1, %cmp2
ret <2 x i1> %r
}
-
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