[PATCH] D150844: [X86]Fix wrong asm match for MASKMOVDQU
Wang, Xin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 18 00:15:16 PDT 2023
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc9820754ae49: [X86]Fix wrong asm match for MASKMOVDQU (authored by XinWang10).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D150844/new/
https://reviews.llvm.org/D150844
Files:
llvm/lib/Target/X86/X86InstrSSE.td
llvm/test/MC/X86/x86_64-asm-match.s
Index: llvm/test/MC/X86/x86_64-asm-match.s
===================================================================
--- llvm/test/MC/X86/x86_64-asm-match.s
+++ llvm/test/MC/X86/x86_64-asm-match.s
@@ -37,11 +37,18 @@
// CHECK: Matching formal operand class MCK_GR32 against actual operand at index 2 (Reg:ecx): match success using generic matcher
// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range
// CHECK: Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 2 encodings with mnemonic 'maskmovdqu'
+// CHECK: Trying to match opcode MASKMOVDQU64
+// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 1 (Reg:xmm0): match success using generic matcher
+// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 2 (Reg:xmm1): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range
+// CHECK: Opcode result: complete match, selecting this opcode
// CHECK: AsmMatcher: found 2 encodings with mnemonic 'vmaskmovdqu'
// CHECK: Trying to match opcode VMASKMOVDQU64
// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 1 (Reg:xmm0): match success using generic matcher
// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 2 (Reg:xmm1): match success using generic matcher
// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range
+// CHECK: Opcode result: complete match, selecting this opcode
// CHECK: AsmMatcher: found 4 encodings with mnemonic 'punpcklbw'
// CHECK: Trying to match opcode MMX_PUNPCKLBWrr
// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 1 (Reg:mm0): match success using generic matcher
@@ -56,6 +63,7 @@
sha1rnds4 $1, %xmm1, %xmm2
pinsrw $3, %ecx, %xmm5
crc32l %gs:0xdeadbeef(%rbx,%rcx,8),%ecx
+maskmovdqu %xmm0, %xmm1
vmaskmovdqu %xmm0, %xmm1
.intel_syntax
Index: llvm/lib/Target/X86/X86InstrSSE.td
===================================================================
--- llvm/lib/Target/X86/X86InstrSSE.td
+++ llvm/lib/Target/X86/X86InstrSSE.td
@@ -4083,14 +4083,14 @@
[(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>,
VEX, WIG;
-let Uses = [EDI], Predicates = [UseSSE2] in
-def MASKMOVDQU : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
- "maskmovdqu\t{$mask, $src|$src, $mask}",
- [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>;
let Uses = [RDI], Predicates = [UseSSE2,In64BitMode] in
def MASKMOVDQU64 : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
"maskmovdqu\t{$mask, $src|$src, $mask}",
[(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, RDI)]>;
+let Uses = [EDI], Predicates = [UseSSE2] in
+def MASKMOVDQU : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
+ "maskmovdqu\t{$mask, $src|$src, $mask}",
+ [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>;
} // ExeDomain = SSEPackedInt
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