[PATCH] D149383: [SelectionDAG][WIP] Add support for evaluating SetCC based on knownbits

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n updated this revision to Diff 523267.
goldstein.w.n added a comment.
Herald added subscribers: kerbowa, jvesely, nemanjai.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149383/new/

https://reviews.llvm.org/D149383

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll
  llvm/test/CodeGen/AArch64/andcompare.ll
  llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
  llvm/test/CodeGen/AArch64/icmp-shift-opt.ll
  llvm/test/CodeGen/AArch64/pr59902.ll
  llvm/test/CodeGen/AArch64/setcc-fsh.ll
  llvm/test/CodeGen/AArch64/urem-seteq-vec-tautological.ll
  llvm/test/CodeGen/AArch64/use-cr-result-of-dom-icmp-st.ll
  llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
  llvm/test/CodeGen/AMDGPU/fshl.ll
  llvm/test/CodeGen/ARM/atomicrmw-uinc-udec-wrap.ll
  llvm/test/CodeGen/ARM/bfi.ll
  llvm/test/CodeGen/ARM/cmp-peephole.ll
  llvm/test/CodeGen/ARM/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
  llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
  llvm/test/CodeGen/ARM/icmp-shift-opt.ll
  llvm/test/CodeGen/Hexagon/vect/zext-v4i1.ll
  llvm/test/CodeGen/PowerPC/p10-handle-split-promote-vec.ll
  llvm/test/CodeGen/RISCV/div-pow2.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
  llvm/test/CodeGen/RISCV/sextw-removal.ll
  llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll
  llvm/test/CodeGen/X86/avx512-mask-op.ll
  llvm/test/CodeGen/X86/cmp-concat.ll
  llvm/test/CodeGen/X86/cmp.ll
  llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
  llvm/test/CodeGen/X86/fold-rmw-ops.ll
  llvm/test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
  llvm/test/CodeGen/X86/icmp-shift-opt.ll
  llvm/test/CodeGen/X86/legalize-shift.ll
  llvm/test/CodeGen/X86/movmsk-cmp.ll
  llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
  llvm/test/CodeGen/X86/or-with-overflow.ll
  llvm/test/CodeGen/X86/peep-test-4.ll
  llvm/test/CodeGen/X86/pr16031.ll
  llvm/test/CodeGen/X86/select.ll
  llvm/test/CodeGen/X86/setcc-fsh.ll
  llvm/test/CodeGen/X86/shrink-compare-pgso.ll
  llvm/test/CodeGen/X86/shrink-compare.ll
  llvm/test/CodeGen/X86/vector-compare-any_of.ll
  llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
  llvm/test/CodeGen/X86/xor.ll

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