[PATCH] D150792: [RegScavenger] Change scavengeRegister to pick registers in allocation order

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
foad added a reviewer: AMDGPU.
Herald added subscribers: StephenFan, kerbowa, arphaman, hiraditya, jvesely, qcolombet.
Herald added a project: All.
foad requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This matches what scavengeRegisterBackwards does.

This is in preparation for converting most uses of scavengeRegister to
scavengeRegisterBackwards, to reduce test case churn when that lands and
to help with bisection if anything goes wrong.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150792

Files:
  llvm/include/llvm/CodeGen/RegisterScavenging.h
  llvm/lib/CodeGen/RegisterScavenging.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
  llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
  llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
  llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
  llvm/test/CodeGen/AMDGPU/flat-scratch.ll
  llvm/test/CodeGen/AMDGPU/frame-index.mir
  llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
  llvm/test/CodeGen/AMDGPU/load-lo16.ll
  llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
  llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
  llvm/test/CodeGen/AMDGPU/scratch-simple.ll
  llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
  llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
  llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D150792.523068.patch
Type: text/x-patch
Size: 105894 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230517/db5f1e89/attachment.bin>