[llvm] 2fb7506 - [X86][MC] Move the code about VPCMP encoding optimization to X86EncodingOptimization.cpp, NFCI
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Wed May 17 07:11:20 PDT 2023
Author: Shengchen Kan
Date: 2023-05-17T22:11:02+08:00
New Revision: 2fb7506f581f27cf83eb287bbe9454bcb0d00996
URL: https://github.com/llvm/llvm-project/commit/2fb7506f581f27cf83eb287bbe9454bcb0d00996
DIFF: https://github.com/llvm/llvm-project/commit/2fb7506f581f27cf83eb287bbe9454bcb0d00996.diff
LOG: [X86][MC] Move the code about VPCMP encoding optimization to X86EncodingOptimization.cpp, NFCI
Added:
Modified:
llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.h
llvm/lib/Target/X86/X86MCInstLower.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
index 80af902312de9..5aab27b03112e 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
@@ -149,6 +149,7 @@ bool X86::optimizeShiftRotateWithImmediateOne(MCInst &MI) {
TO_IMM1(SHL16m)
TO_IMM1(SHL32m)
TO_IMM1(SHL64m)
+#undef TO_IMM1
}
MCOperand &LastOp = MI.getOperand(MI.getNumOperands() - 1);
if (!LastOp.isImm() || LastOp.getImm() != 1)
@@ -157,3 +158,89 @@ bool X86::optimizeShiftRotateWithImmediateOne(MCInst &MI) {
MI.erase(&LastOp);
return true;
}
+
+bool X86::optimizeVPCMPWithImmediateOneOrSix(MCInst &MI) {
+ unsigned Opc1;
+ unsigned Opc2;
+#define FROM_TO(FROM, TO1, TO2) \
+ case X86::FROM: \
+ Opc1 = X86::TO1; \
+ Opc2 = X86::TO2; \
+ break;
+ switch (MI.getOpcode()) {
+ default:
+ return false;
+ FROM_TO(VPCMPBZ128rmi, VPCMPEQBZ128rm, VPCMPGTBZ128rm)
+ FROM_TO(VPCMPBZ128rmik, VPCMPEQBZ128rmk, VPCMPGTBZ128rmk)
+ FROM_TO(VPCMPBZ128rri, VPCMPEQBZ128rr, VPCMPGTBZ128rr)
+ FROM_TO(VPCMPBZ128rrik, VPCMPEQBZ128rrk, VPCMPGTBZ128rrk)
+ FROM_TO(VPCMPBZ256rmi, VPCMPEQBZ256rm, VPCMPGTBZ256rm)
+ FROM_TO(VPCMPBZ256rmik, VPCMPEQBZ256rmk, VPCMPGTBZ256rmk)
+ FROM_TO(VPCMPBZ256rri, VPCMPEQBZ256rr, VPCMPGTBZ256rr)
+ FROM_TO(VPCMPBZ256rrik, VPCMPEQBZ256rrk, VPCMPGTBZ256rrk)
+ FROM_TO(VPCMPBZrmi, VPCMPEQBZrm, VPCMPGTBZrm)
+ FROM_TO(VPCMPBZrmik, VPCMPEQBZrmk, VPCMPGTBZrmk)
+ FROM_TO(VPCMPBZrri, VPCMPEQBZrr, VPCMPGTBZrr)
+ FROM_TO(VPCMPBZrrik, VPCMPEQBZrrk, VPCMPGTBZrrk)
+ FROM_TO(VPCMPDZ128rmi, VPCMPEQDZ128rm, VPCMPGTDZ128rm)
+ FROM_TO(VPCMPDZ128rmib, VPCMPEQDZ128rmb, VPCMPGTDZ128rmb)
+ FROM_TO(VPCMPDZ128rmibk, VPCMPEQDZ128rmbk, VPCMPGTDZ128rmbk)
+ FROM_TO(VPCMPDZ128rmik, VPCMPEQDZ128rmk, VPCMPGTDZ128rmk)
+ FROM_TO(VPCMPDZ128rri, VPCMPEQDZ128rr, VPCMPGTDZ128rr)
+ FROM_TO(VPCMPDZ128rrik, VPCMPEQDZ128rrk, VPCMPGTDZ128rrk)
+ FROM_TO(VPCMPDZ256rmi, VPCMPEQDZ256rm, VPCMPGTDZ256rm)
+ FROM_TO(VPCMPDZ256rmib, VPCMPEQDZ256rmb, VPCMPGTDZ256rmb)
+ FROM_TO(VPCMPDZ256rmibk, VPCMPEQDZ256rmbk, VPCMPGTDZ256rmbk)
+ FROM_TO(VPCMPDZ256rmik, VPCMPEQDZ256rmk, VPCMPGTDZ256rmk)
+ FROM_TO(VPCMPDZ256rri, VPCMPEQDZ256rr, VPCMPGTDZ256rr)
+ FROM_TO(VPCMPDZ256rrik, VPCMPEQDZ256rrk, VPCMPGTDZ256rrk)
+ FROM_TO(VPCMPDZrmi, VPCMPEQDZrm, VPCMPGTDZrm)
+ FROM_TO(VPCMPDZrmib, VPCMPEQDZrmb, VPCMPGTDZrmb)
+ FROM_TO(VPCMPDZrmibk, VPCMPEQDZrmbk, VPCMPGTDZrmbk)
+ FROM_TO(VPCMPDZrmik, VPCMPEQDZrmk, VPCMPGTDZrmk)
+ FROM_TO(VPCMPDZrri, VPCMPEQDZrr, VPCMPGTDZrr)
+ FROM_TO(VPCMPDZrrik, VPCMPEQDZrrk, VPCMPGTDZrrk)
+ FROM_TO(VPCMPQZ128rmi, VPCMPEQQZ128rm, VPCMPGTQZ128rm)
+ FROM_TO(VPCMPQZ128rmib, VPCMPEQQZ128rmb, VPCMPGTQZ128rmb)
+ FROM_TO(VPCMPQZ128rmibk, VPCMPEQQZ128rmbk, VPCMPGTQZ128rmbk)
+ FROM_TO(VPCMPQZ128rmik, VPCMPEQQZ128rmk, VPCMPGTQZ128rmk)
+ FROM_TO(VPCMPQZ128rri, VPCMPEQQZ128rr, VPCMPGTQZ128rr)
+ FROM_TO(VPCMPQZ128rrik, VPCMPEQQZ128rrk, VPCMPGTQZ128rrk)
+ FROM_TO(VPCMPQZ256rmi, VPCMPEQQZ256rm, VPCMPGTQZ256rm)
+ FROM_TO(VPCMPQZ256rmib, VPCMPEQQZ256rmb, VPCMPGTQZ256rmb)
+ FROM_TO(VPCMPQZ256rmibk, VPCMPEQQZ256rmbk, VPCMPGTQZ256rmbk)
+ FROM_TO(VPCMPQZ256rmik, VPCMPEQQZ256rmk, VPCMPGTQZ256rmk)
+ FROM_TO(VPCMPQZ256rri, VPCMPEQQZ256rr, VPCMPGTQZ256rr)
+ FROM_TO(VPCMPQZ256rrik, VPCMPEQQZ256rrk, VPCMPGTQZ256rrk)
+ FROM_TO(VPCMPQZrmi, VPCMPEQQZrm, VPCMPGTQZrm)
+ FROM_TO(VPCMPQZrmib, VPCMPEQQZrmb, VPCMPGTQZrmb)
+ FROM_TO(VPCMPQZrmibk, VPCMPEQQZrmbk, VPCMPGTQZrmbk)
+ FROM_TO(VPCMPQZrmik, VPCMPEQQZrmk, VPCMPGTQZrmk)
+ FROM_TO(VPCMPQZrri, VPCMPEQQZrr, VPCMPGTQZrr)
+ FROM_TO(VPCMPQZrrik, VPCMPEQQZrrk, VPCMPGTQZrrk)
+ FROM_TO(VPCMPWZ128rmi, VPCMPEQWZ128rm, VPCMPGTWZ128rm)
+ FROM_TO(VPCMPWZ128rmik, VPCMPEQWZ128rmk, VPCMPGTWZ128rmk)
+ FROM_TO(VPCMPWZ128rri, VPCMPEQWZ128rr, VPCMPGTWZ128rr)
+ FROM_TO(VPCMPWZ128rrik, VPCMPEQWZ128rrk, VPCMPGTWZ128rrk)
+ FROM_TO(VPCMPWZ256rmi, VPCMPEQWZ256rm, VPCMPGTWZ256rm)
+ FROM_TO(VPCMPWZ256rmik, VPCMPEQWZ256rmk, VPCMPGTWZ256rmk)
+ FROM_TO(VPCMPWZ256rri, VPCMPEQWZ256rr, VPCMPGTWZ256rr)
+ FROM_TO(VPCMPWZ256rrik, VPCMPEQWZ256rrk, VPCMPGTWZ256rrk)
+ FROM_TO(VPCMPWZrmi, VPCMPEQWZrm, VPCMPGTWZrm)
+ FROM_TO(VPCMPWZrmik, VPCMPEQWZrmk, VPCMPGTWZrmk)
+ FROM_TO(VPCMPWZrri, VPCMPEQWZrr, VPCMPGTWZrr)
+ FROM_TO(VPCMPWZrrik, VPCMPEQWZrrk, VPCMPGTWZrrk)
+ }
+ MCOperand &LastOp = MI.getOperand(MI.getNumOperands() - 1);
+ int64_t Imm = LastOp.getImm();
+ unsigned NewOpc;
+ if (Imm == 0)
+ NewOpc = Opc1;
+ else if(Imm == 6)
+ NewOpc = Opc2;
+ else
+ return false;
+ MI.setOpcode(NewOpc);
+ MI.erase(&LastOp);
+ return true;
+}
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.h b/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.h
index 35f3ba559ab59..42c12392b3e8d 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.h
@@ -18,6 +18,7 @@ class MCInstrDesc;
namespace X86 {
bool optimizeInstFromVEX3ToVEX2(MCInst &MI, const MCInstrDesc &Desc);
bool optimizeShiftRotateWithImmediateOne(MCInst &MI);
+bool optimizeVPCMPWithImmediateOneOrSix(MCInst &MI);
} // namespace X86
} // namespace llvm
#endif
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index bad9c4fd0fa76..cf5d4f91fef92 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -508,6 +508,9 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
if (X86::optimizeShiftRotateWithImmediateOne(OutMI))
return;
+ if (X86::optimizeVPCMPWithImmediateOneOrSix(OutMI))
+ return;
+
// Handle a few special cases to eliminate operand modifiers.
switch (OutMI.getOpcode()) {
case X86::LEA64_32r:
@@ -541,183 +544,6 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
break;
}
- case X86::VPCMPBZ128rmi: case X86::VPCMPBZ128rmik:
- case X86::VPCMPBZ128rri: case X86::VPCMPBZ128rrik:
- case X86::VPCMPBZ256rmi: case X86::VPCMPBZ256rmik:
- case X86::VPCMPBZ256rri: case X86::VPCMPBZ256rrik:
- case X86::VPCMPBZrmi: case X86::VPCMPBZrmik:
- case X86::VPCMPBZrri: case X86::VPCMPBZrrik:
- case X86::VPCMPDZ128rmi: case X86::VPCMPDZ128rmik:
- case X86::VPCMPDZ128rmib: case X86::VPCMPDZ128rmibk:
- case X86::VPCMPDZ128rri: case X86::VPCMPDZ128rrik:
- case X86::VPCMPDZ256rmi: case X86::VPCMPDZ256rmik:
- case X86::VPCMPDZ256rmib: case X86::VPCMPDZ256rmibk:
- case X86::VPCMPDZ256rri: case X86::VPCMPDZ256rrik:
- case X86::VPCMPDZrmi: case X86::VPCMPDZrmik:
- case X86::VPCMPDZrmib: case X86::VPCMPDZrmibk:
- case X86::VPCMPDZrri: case X86::VPCMPDZrrik:
- case X86::VPCMPQZ128rmi: case X86::VPCMPQZ128rmik:
- case X86::VPCMPQZ128rmib: case X86::VPCMPQZ128rmibk:
- case X86::VPCMPQZ128rri: case X86::VPCMPQZ128rrik:
- case X86::VPCMPQZ256rmi: case X86::VPCMPQZ256rmik:
- case X86::VPCMPQZ256rmib: case X86::VPCMPQZ256rmibk:
- case X86::VPCMPQZ256rri: case X86::VPCMPQZ256rrik:
- case X86::VPCMPQZrmi: case X86::VPCMPQZrmik:
- case X86::VPCMPQZrmib: case X86::VPCMPQZrmibk:
- case X86::VPCMPQZrri: case X86::VPCMPQZrrik:
- case X86::VPCMPWZ128rmi: case X86::VPCMPWZ128rmik:
- case X86::VPCMPWZ128rri: case X86::VPCMPWZ128rrik:
- case X86::VPCMPWZ256rmi: case X86::VPCMPWZ256rmik:
- case X86::VPCMPWZ256rri: case X86::VPCMPWZ256rrik:
- case X86::VPCMPWZrmi: case X86::VPCMPWZrmik:
- case X86::VPCMPWZrri: case X86::VPCMPWZrrik: {
- // Turn immediate 0 into the VPCMPEQ instruction.
- if (OutMI.getOperand(OutMI.getNumOperands() - 1).getImm() == 0) {
- unsigned NewOpc;
- switch (OutMI.getOpcode()) {
- default: llvm_unreachable("Invalid opcode");
- case X86::VPCMPBZ128rmi: NewOpc = X86::VPCMPEQBZ128rm; break;
- case X86::VPCMPBZ128rmik: NewOpc = X86::VPCMPEQBZ128rmk; break;
- case X86::VPCMPBZ128rri: NewOpc = X86::VPCMPEQBZ128rr; break;
- case X86::VPCMPBZ128rrik: NewOpc = X86::VPCMPEQBZ128rrk; break;
- case X86::VPCMPBZ256rmi: NewOpc = X86::VPCMPEQBZ256rm; break;
- case X86::VPCMPBZ256rmik: NewOpc = X86::VPCMPEQBZ256rmk; break;
- case X86::VPCMPBZ256rri: NewOpc = X86::VPCMPEQBZ256rr; break;
- case X86::VPCMPBZ256rrik: NewOpc = X86::VPCMPEQBZ256rrk; break;
- case X86::VPCMPBZrmi: NewOpc = X86::VPCMPEQBZrm; break;
- case X86::VPCMPBZrmik: NewOpc = X86::VPCMPEQBZrmk; break;
- case X86::VPCMPBZrri: NewOpc = X86::VPCMPEQBZrr; break;
- case X86::VPCMPBZrrik: NewOpc = X86::VPCMPEQBZrrk; break;
- case X86::VPCMPDZ128rmi: NewOpc = X86::VPCMPEQDZ128rm; break;
- case X86::VPCMPDZ128rmib: NewOpc = X86::VPCMPEQDZ128rmb; break;
- case X86::VPCMPDZ128rmibk: NewOpc = X86::VPCMPEQDZ128rmbk; break;
- case X86::VPCMPDZ128rmik: NewOpc = X86::VPCMPEQDZ128rmk; break;
- case X86::VPCMPDZ128rri: NewOpc = X86::VPCMPEQDZ128rr; break;
- case X86::VPCMPDZ128rrik: NewOpc = X86::VPCMPEQDZ128rrk; break;
- case X86::VPCMPDZ256rmi: NewOpc = X86::VPCMPEQDZ256rm; break;
- case X86::VPCMPDZ256rmib: NewOpc = X86::VPCMPEQDZ256rmb; break;
- case X86::VPCMPDZ256rmibk: NewOpc = X86::VPCMPEQDZ256rmbk; break;
- case X86::VPCMPDZ256rmik: NewOpc = X86::VPCMPEQDZ256rmk; break;
- case X86::VPCMPDZ256rri: NewOpc = X86::VPCMPEQDZ256rr; break;
- case X86::VPCMPDZ256rrik: NewOpc = X86::VPCMPEQDZ256rrk; break;
- case X86::VPCMPDZrmi: NewOpc = X86::VPCMPEQDZrm; break;
- case X86::VPCMPDZrmib: NewOpc = X86::VPCMPEQDZrmb; break;
- case X86::VPCMPDZrmibk: NewOpc = X86::VPCMPEQDZrmbk; break;
- case X86::VPCMPDZrmik: NewOpc = X86::VPCMPEQDZrmk; break;
- case X86::VPCMPDZrri: NewOpc = X86::VPCMPEQDZrr; break;
- case X86::VPCMPDZrrik: NewOpc = X86::VPCMPEQDZrrk; break;
- case X86::VPCMPQZ128rmi: NewOpc = X86::VPCMPEQQZ128rm; break;
- case X86::VPCMPQZ128rmib: NewOpc = X86::VPCMPEQQZ128rmb; break;
- case X86::VPCMPQZ128rmibk: NewOpc = X86::VPCMPEQQZ128rmbk; break;
- case X86::VPCMPQZ128rmik: NewOpc = X86::VPCMPEQQZ128rmk; break;
- case X86::VPCMPQZ128rri: NewOpc = X86::VPCMPEQQZ128rr; break;
- case X86::VPCMPQZ128rrik: NewOpc = X86::VPCMPEQQZ128rrk; break;
- case X86::VPCMPQZ256rmi: NewOpc = X86::VPCMPEQQZ256rm; break;
- case X86::VPCMPQZ256rmib: NewOpc = X86::VPCMPEQQZ256rmb; break;
- case X86::VPCMPQZ256rmibk: NewOpc = X86::VPCMPEQQZ256rmbk; break;
- case X86::VPCMPQZ256rmik: NewOpc = X86::VPCMPEQQZ256rmk; break;
- case X86::VPCMPQZ256rri: NewOpc = X86::VPCMPEQQZ256rr; break;
- case X86::VPCMPQZ256rrik: NewOpc = X86::VPCMPEQQZ256rrk; break;
- case X86::VPCMPQZrmi: NewOpc = X86::VPCMPEQQZrm; break;
- case X86::VPCMPQZrmib: NewOpc = X86::VPCMPEQQZrmb; break;
- case X86::VPCMPQZrmibk: NewOpc = X86::VPCMPEQQZrmbk; break;
- case X86::VPCMPQZrmik: NewOpc = X86::VPCMPEQQZrmk; break;
- case X86::VPCMPQZrri: NewOpc = X86::VPCMPEQQZrr; break;
- case X86::VPCMPQZrrik: NewOpc = X86::VPCMPEQQZrrk; break;
- case X86::VPCMPWZ128rmi: NewOpc = X86::VPCMPEQWZ128rm; break;
- case X86::VPCMPWZ128rmik: NewOpc = X86::VPCMPEQWZ128rmk; break;
- case X86::VPCMPWZ128rri: NewOpc = X86::VPCMPEQWZ128rr; break;
- case X86::VPCMPWZ128rrik: NewOpc = X86::VPCMPEQWZ128rrk; break;
- case X86::VPCMPWZ256rmi: NewOpc = X86::VPCMPEQWZ256rm; break;
- case X86::VPCMPWZ256rmik: NewOpc = X86::VPCMPEQWZ256rmk; break;
- case X86::VPCMPWZ256rri: NewOpc = X86::VPCMPEQWZ256rr; break;
- case X86::VPCMPWZ256rrik: NewOpc = X86::VPCMPEQWZ256rrk; break;
- case X86::VPCMPWZrmi: NewOpc = X86::VPCMPEQWZrm; break;
- case X86::VPCMPWZrmik: NewOpc = X86::VPCMPEQWZrmk; break;
- case X86::VPCMPWZrri: NewOpc = X86::VPCMPEQWZrr; break;
- case X86::VPCMPWZrrik: NewOpc = X86::VPCMPEQWZrrk; break;
- }
-
- OutMI.setOpcode(NewOpc);
- OutMI.erase(&OutMI.getOperand(OutMI.getNumOperands() - 1));
- break;
- }
-
- // Turn immediate 6 into the VPCMPGT instruction.
- if (OutMI.getOperand(OutMI.getNumOperands() - 1).getImm() == 6) {
- unsigned NewOpc;
- switch (OutMI.getOpcode()) {
- default: llvm_unreachable("Invalid opcode");
- case X86::VPCMPBZ128rmi: NewOpc = X86::VPCMPGTBZ128rm; break;
- case X86::VPCMPBZ128rmik: NewOpc = X86::VPCMPGTBZ128rmk; break;
- case X86::VPCMPBZ128rri: NewOpc = X86::VPCMPGTBZ128rr; break;
- case X86::VPCMPBZ128rrik: NewOpc = X86::VPCMPGTBZ128rrk; break;
- case X86::VPCMPBZ256rmi: NewOpc = X86::VPCMPGTBZ256rm; break;
- case X86::VPCMPBZ256rmik: NewOpc = X86::VPCMPGTBZ256rmk; break;
- case X86::VPCMPBZ256rri: NewOpc = X86::VPCMPGTBZ256rr; break;
- case X86::VPCMPBZ256rrik: NewOpc = X86::VPCMPGTBZ256rrk; break;
- case X86::VPCMPBZrmi: NewOpc = X86::VPCMPGTBZrm; break;
- case X86::VPCMPBZrmik: NewOpc = X86::VPCMPGTBZrmk; break;
- case X86::VPCMPBZrri: NewOpc = X86::VPCMPGTBZrr; break;
- case X86::VPCMPBZrrik: NewOpc = X86::VPCMPGTBZrrk; break;
- case X86::VPCMPDZ128rmi: NewOpc = X86::VPCMPGTDZ128rm; break;
- case X86::VPCMPDZ128rmib: NewOpc = X86::VPCMPGTDZ128rmb; break;
- case X86::VPCMPDZ128rmibk: NewOpc = X86::VPCMPGTDZ128rmbk; break;
- case X86::VPCMPDZ128rmik: NewOpc = X86::VPCMPGTDZ128rmk; break;
- case X86::VPCMPDZ128rri: NewOpc = X86::VPCMPGTDZ128rr; break;
- case X86::VPCMPDZ128rrik: NewOpc = X86::VPCMPGTDZ128rrk; break;
- case X86::VPCMPDZ256rmi: NewOpc = X86::VPCMPGTDZ256rm; break;
- case X86::VPCMPDZ256rmib: NewOpc = X86::VPCMPGTDZ256rmb; break;
- case X86::VPCMPDZ256rmibk: NewOpc = X86::VPCMPGTDZ256rmbk; break;
- case X86::VPCMPDZ256rmik: NewOpc = X86::VPCMPGTDZ256rmk; break;
- case X86::VPCMPDZ256rri: NewOpc = X86::VPCMPGTDZ256rr; break;
- case X86::VPCMPDZ256rrik: NewOpc = X86::VPCMPGTDZ256rrk; break;
- case X86::VPCMPDZrmi: NewOpc = X86::VPCMPGTDZrm; break;
- case X86::VPCMPDZrmib: NewOpc = X86::VPCMPGTDZrmb; break;
- case X86::VPCMPDZrmibk: NewOpc = X86::VPCMPGTDZrmbk; break;
- case X86::VPCMPDZrmik: NewOpc = X86::VPCMPGTDZrmk; break;
- case X86::VPCMPDZrri: NewOpc = X86::VPCMPGTDZrr; break;
- case X86::VPCMPDZrrik: NewOpc = X86::VPCMPGTDZrrk; break;
- case X86::VPCMPQZ128rmi: NewOpc = X86::VPCMPGTQZ128rm; break;
- case X86::VPCMPQZ128rmib: NewOpc = X86::VPCMPGTQZ128rmb; break;
- case X86::VPCMPQZ128rmibk: NewOpc = X86::VPCMPGTQZ128rmbk; break;
- case X86::VPCMPQZ128rmik: NewOpc = X86::VPCMPGTQZ128rmk; break;
- case X86::VPCMPQZ128rri: NewOpc = X86::VPCMPGTQZ128rr; break;
- case X86::VPCMPQZ128rrik: NewOpc = X86::VPCMPGTQZ128rrk; break;
- case X86::VPCMPQZ256rmi: NewOpc = X86::VPCMPGTQZ256rm; break;
- case X86::VPCMPQZ256rmib: NewOpc = X86::VPCMPGTQZ256rmb; break;
- case X86::VPCMPQZ256rmibk: NewOpc = X86::VPCMPGTQZ256rmbk; break;
- case X86::VPCMPQZ256rmik: NewOpc = X86::VPCMPGTQZ256rmk; break;
- case X86::VPCMPQZ256rri: NewOpc = X86::VPCMPGTQZ256rr; break;
- case X86::VPCMPQZ256rrik: NewOpc = X86::VPCMPGTQZ256rrk; break;
- case X86::VPCMPQZrmi: NewOpc = X86::VPCMPGTQZrm; break;
- case X86::VPCMPQZrmib: NewOpc = X86::VPCMPGTQZrmb; break;
- case X86::VPCMPQZrmibk: NewOpc = X86::VPCMPGTQZrmbk; break;
- case X86::VPCMPQZrmik: NewOpc = X86::VPCMPGTQZrmk; break;
- case X86::VPCMPQZrri: NewOpc = X86::VPCMPGTQZrr; break;
- case X86::VPCMPQZrrik: NewOpc = X86::VPCMPGTQZrrk; break;
- case X86::VPCMPWZ128rmi: NewOpc = X86::VPCMPGTWZ128rm; break;
- case X86::VPCMPWZ128rmik: NewOpc = X86::VPCMPGTWZ128rmk; break;
- case X86::VPCMPWZ128rri: NewOpc = X86::VPCMPGTWZ128rr; break;
- case X86::VPCMPWZ128rrik: NewOpc = X86::VPCMPGTWZ128rrk; break;
- case X86::VPCMPWZ256rmi: NewOpc = X86::VPCMPGTWZ256rm; break;
- case X86::VPCMPWZ256rmik: NewOpc = X86::VPCMPGTWZ256rmk; break;
- case X86::VPCMPWZ256rri: NewOpc = X86::VPCMPGTWZ256rr; break;
- case X86::VPCMPWZ256rrik: NewOpc = X86::VPCMPGTWZ256rrk; break;
- case X86::VPCMPWZrmi: NewOpc = X86::VPCMPGTWZrm; break;
- case X86::VPCMPWZrmik: NewOpc = X86::VPCMPGTWZrmk; break;
- case X86::VPCMPWZrri: NewOpc = X86::VPCMPGTWZrr; break;
- case X86::VPCMPWZrrik: NewOpc = X86::VPCMPGTWZrrk; break;
- }
-
- OutMI.setOpcode(NewOpc);
- OutMI.erase(&OutMI.getOperand(OutMI.getNumOperands() - 1));
- break;
- }
-
- break;
- }
-
// CALL64r, CALL64pcrel32 - These instructions used to have
// register inputs modeled as normal uses instead of implicit uses. As such,
// they we used to truncate off all but the first operand (the callee). This
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