[PATCH] D150665: [RISCV] Handle addimm chains in SelectAddrRegImm

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Can this create additional LUIs if the lower 12-bits wrap around? That defeats the point of the common base optimization.

Does this prevent using C.LW/C.SW/C.LD/C.SD because we've increased the size of the offsets?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D150665/new/

https://reviews.llvm.org/D150665