[PATCH] D150717: [RISCV] Use scalar stores for splats of zero to memory upto 2 x XLen

[Philip Reames via Phabricator via llvm-commits]

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The direct motivation here is to undo an unprofitable vectorization performed by SLP, but the transform seems generally useful as well.  If we are storing a zero to memory, we can use two scalar stores (from X0) for all power of two sizes up to 128 (for 64 bit) or 64 (for 32 bit).

One concern here is that splitting the store into two instructions could introduce a store-to-load forwarding stall.  I think this is worth doing, but what do others think?  Should we restrict this to a maximum of XLEN sized operations which can be done in a single store?

This transform is potentially increasing the number of memory operations (from 1 to 2).  The same restriction mentioned above would resolve this as well.

Note: We can extend this transform in a bunch of ways.  I'm deliberately starting narrow to focus on the two questions highlighted just above.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150717

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll
  llvm/test/CodeGen/RISCV/rvv/splats-with-mixed-vl.ll

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