[PATCH] D150347: [AMDGPU] Improve abs modifier usage
Thomas Symalla via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 16 06:35:18 PDT 2023
tsymalla marked an inline comment as done.
tsymalla added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/andorbitset.ll:56
; SI-NOT: %bb.1:
-; SI: s_bitset0_b32 s{{[0-9]+}}, 31
+; SI: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x7fffffff
define void @bitset_verifier_error() local_unnamed_addr #0 {
----------------
foad wrote:
> I guess we no longer form s_bitset because the s_and uses two different registers? That means that this is no longer testing the original bug from D85307. Maybe change the test to use `and i32 undef, 0xBFFFFFFF` (clear bit 30) instead of fabs, so that your new optimization won't spoil it?
Yes, this is, because two different SGPRs are being used. Thanks for the suggestion. I think it makes sense, but unfortunately, it doesn't work. In the original test, the fabs calls are kept until we reach isel - which is a bit strange, because the fabs calls are trivially redundant semantically.
```
%i = call float @llvm.fabs.f32(float undef) #6
%i1 = bitcast float %i to i32
store i32 %i1, ptr addrspace(1) @gv, align 4
%0 = call float @llvm.fabs.f32(float undef) #6
```
However, when using `and` instead, the expressions are eliminated early.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D150347/new/
https://reviews.llvm.org/D150347
More information about the llvm-commits
mailing list