[llvm] 8cf5f73 - [RISCV] Avoid RegScavenger::forward in RISCVMakeCompressibleOpt
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Tue May 16 01:13:03 PDT 2023
Author: Jay Foad
Date: 2023-05-16T09:10:49+01:00
New Revision: 8cf5f730fb02d7bd794ca68764b7eaf0cb329a6c
URL: https://github.com/llvm/llvm-project/commit/8cf5f730fb02d7bd794ca68764b7eaf0cb329a6c
DIFF: https://github.com/llvm/llvm-project/commit/8cf5f730fb02d7bd794ca68764b7eaf0cb329a6c.diff
LOG: [RISCV] Avoid RegScavenger::forward in RISCVMakeCompressibleOpt
RegScavenger::backward is preferred because it does not rely on accurate
kill flags.
Differential Revision: https://reviews.llvm.org/D150562
Added:
Modified:
llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp b/llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
index e6ae40970d51..841439bb732e 100644
--- a/llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
@@ -227,9 +227,6 @@ static Register analyzeCompressibleUses(MachineInstr &FirstMI,
const TargetRegisterInfo *TRI =
MBB.getParent()->getSubtarget().getRegisterInfo();
- RegScavenger RS;
- RS.enterBasicBlock(MBB);
-
for (MachineBasicBlock::instr_iterator I = FirstMI.getIterator(),
E = MBB.instr_end();
I != E; ++I) {
@@ -238,14 +235,8 @@ static Register analyzeCompressibleUses(MachineInstr &FirstMI,
// Determine if this is an instruction which would benefit from using the
// new register.
RegImmPair CandidateRegImm = getRegImmPairPreventingCompression(MI);
- if (CandidateRegImm.Reg == RegImm.Reg &&
- CandidateRegImm.Imm == RegImm.Imm) {
- // Advance tracking since the value in the new register must be live for
- // this instruction too.
- RS.forward(I);
-
+ if (CandidateRegImm.Reg == RegImm.Reg && CandidateRegImm.Imm == RegImm.Imm)
MIs.push_back(&MI);
- }
// If RegImm.Reg is modified by this instruction, then we cannot optimize
// past this instruction. If the register is already compressed, then it may
@@ -278,6 +269,9 @@ static Register analyzeCompressibleUses(MachineInstr &FirstMI,
else
return RISCV::NoRegister;
+ RegScavenger RS;
+ RS.enterBasicBlockEnd(MBB);
+ RS.backward(MIs.back()->getIterator());
return RS.scavengeRegisterBackwards(*RCToScavenge, FirstMI.getIterator(),
/*RestoreAfter=*/false, /*SPAdj=*/0,
/*AllowSpill=*/false);
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