[PATCH] D150612: AMDGPU: Expand casted f16 fmed3 pattern to fmin/fmax on gfx8

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:11181
+  if (TruncSrc.getOpcode() != AMDGPUISD::FMED3 ||
+      TruncSrc.getValueType() != MVT::f32 || !TruncSrc.hasOneUse() ||
+      !isNullConstant(N->getOperand(1)))
----------------
Pierre-vh wrote:
> Here you check for `f32` explicitly, but I think in the GISel combine you don't enforce it, why?
It doesn't matter much either way since there's no f64 or vector versions of fmed3. 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150612/new/

https://reviews.llvm.org/D150612