[PATCH] D150570: [AMDGPU] Add implicit uses to AGPR copy MIR tests
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 16 00:11:09 PDT 2023
foad added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/copy-vgpr-clobber-spill-vgpr.mir:75
; GFX908-NEXT: ; implicit-def: $vgpr61
- ; GFX908-NEXT: s_nop 1
+ ; GFX908-NEXT: s_nop 0
+ ; GFX908-NEXT: s_nop 0
----------------
Pierre-vh wrote:
> nit: Why is there two nops now?
`s_nop x` means delay for `x+1` cycles so the code is equivalent. I assumed the reason was that the hazard recognizer added the second nop (and was not clever enough to combine it into the first one) but I did not look too closely.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D150570/new/
https://reviews.llvm.org/D150570
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