[PATCH] D150415: [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 15 18:00:51 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/cm_mvas_mvsa.ll:13
+
+define i32 @zcmp(i32 %num, i32 %f) nounwind {
+; CHECK32I-LABEL: zcmp:
----------------
Shouldn't we have more tests to cover cases where the copies aren't next to each other and cases where registers are modified/used in between?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D150415/new/
https://reviews.llvm.org/D150415
More information about the llvm-commits
mailing list