[PATCH] D107279: [RISCV] Add test showing the current extern_weak lowering
Jessica Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 15 13:37:17 PDT 2023
jrtc27 updated this revision to Diff 522320.
jrtc27 added a comment.
Herald added subscribers: jobnoorman, luke.
Rebased
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D107279/new/
https://reviews.llvm.org/D107279
Files:
llvm/test/CodeGen/RISCV/codemodel-lowering.ll
Index: llvm/test/CodeGen/RISCV/codemodel-lowering.ll
===================================================================
--- llvm/test/CodeGen/RISCV/codemodel-lowering.ll
+++ llvm/test/CodeGen/RISCV/codemodel-lowering.ll
@@ -138,3 +138,23 @@
%1 = fadd float %a, 1.0
ret float %1
}
+
+; Check lowering of extern_weaks
+ at W = extern_weak global i32
+
+define i32 @lower_extern_weak(i32 %a) nounwind {
+; RV32I-SMALL-LABEL: lower_extern_weak:
+; RV32I-SMALL: # %bb.0:
+; RV32I-SMALL-NEXT: lui a0, %hi(W)
+; RV32I-SMALL-NEXT: lw a0, %lo(W)(a0)
+; RV32I-SMALL-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: lower_extern_weak:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi3:
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(W)
+; RV32I-MEDIUM-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi3)(a0)
+; RV32I-MEDIUM-NEXT: ret
+ %1 = load volatile i32, i32* @W
+ ret i32 %1
+}
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