[PATCH] D150587: [KnownBits] Make shl/lshr/ashr implementations optimal
Noah Goldstein via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 15 12:53:25 PDT 2023
goldstein.w.n added inline comments.
================
Comment at: llvm/lib/Support/KnownBits.cpp:243
APInt MinShiftAmount = RHS.getMinValue();
- if (MinShiftAmount.ult(BitWidth)) {
- MinLeadingZeros += MinShiftAmount.getZExtValue();
- MinLeadingZeros = std::min(MinLeadingZeros, BitWidth);
- }
+ if (MinShiftAmount.uge(BitWidth))
+ // Always poison. Return unknown because we don't like returning conflict.
----------------
Not for this patch, but in future installments, maybe a third argument to specify behavior here? In the X86 backend, for example, we remove masks on `shiftamt` b.c its known processor will just modulo `shiftamt` by `bitwidth`. Likewise some targets just return zero. If we could specify the behavior, it may be usable in `TargetLowering::computeKnownBitsForTargetNode`.
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https://reviews.llvm.org/D150587/new/
https://reviews.llvm.org/D150587
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