[PATCH] D150583: [IR] Add getAccessType to Instruction. NFC

[Luke Lau via Phabricator via llvm-commits]

luke created this revision.
luke added reviewers: nikic, RKSimon, arsenm, ABataev.
Herald added subscribers: asb, pmatos, StephenFan, hiraditya.
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luke requested review of this revision.
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There are multiple places in the code where the type of memory being accessed
from an instruction needs to be obtained, including an upcoming patch to
improve GEP cost modeling. This adds a method to Instruction with the aim of
eventually deduplicating the logic.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150583

Files:
  llvm/include/llvm/IR/Instruction.h
  llvm/lib/IR/Instruction.cpp


Index: llvm/lib/IR/Instruction.cpp
===================================================================
--- llvm/lib/IR/Instruction.cpp
+++ llvm/lib/IR/Instruction.cpp
@@ -743,6 +743,41 @@
   }
 }
 
+Type *Instruction::getAccessType() const {
+  switch (getOpcode()) {
+  case Instruction::Store:
+    return getOperand(0)->getType();
+  case Instruction::Load:
+  case Instruction::AtomicRMW:
+  case Instruction::AtomicCmpXchg:
+    return getType();
+  case Instruction::Call:
+  case Instruction::Invoke:
+    if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(this)) {
+      switch (II->getIntrinsicID()) {
+      case Intrinsic::masked_load:
+      case Intrinsic::masked_gather:
+      case Intrinsic::masked_expandload:
+      case Intrinsic::vp_load:
+      case Intrinsic::vp_gather:
+      case Intrinsic::experimental_vp_strided_load:
+        return II->getType();
+      case Intrinsic::masked_store:
+      case Intrinsic::masked_scatter:
+      case Intrinsic::masked_compressstore:
+      case Intrinsic::vp_store:
+      case Intrinsic::vp_scatter:
+      case Intrinsic::experimental_vp_strided_store:
+        return II->getOperand(0)->getType();
+      default:
+        break;
+      }
+    }
+  }
+
+  return nullptr;
+}
+
 static bool canUnwindPastLandingPad(const LandingPadInst *LP,
                                     bool IncludePhaseOneUnwind) {
   // Because phase one unwinding skips cleanup landingpads, we effectively
Index: llvm/include/llvm/IR/Instruction.h
===================================================================
--- llvm/include/llvm/IR/Instruction.h
+++ llvm/include/llvm/IR/Instruction.h
@@ -640,6 +640,9 @@
   /// Return true if this instruction has a volatile memory access.
   bool isVolatile() const LLVM_READONLY;
 
+  /// Return the type this instruction accesses in memory, if any.
+  Type *getAccessType() const LLVM_READONLY;
+
   /// Return true if this instruction may throw an exception.
   ///
   /// If IncludePhaseOneUnwind is set, this will also include cases where


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