[llvm] 930421e - [unittests][llvm-exegesis] Remove build warnings [NFCI]
Francesco Petrogalli via llvm-commits
llvm-commits at lists.llvm.org
Mon May 15 06:53:50 PDT 2023
Author: Francesco Petrogalli
Date: 2023-05-15T15:51:23+02:00
New Revision: 930421e18c51c2e8eaf7ea92fcbfc4b1eabc5975
URL: https://github.com/llvm/llvm-project/commit/930421e18c51c2e8eaf7ea92fcbfc4b1eabc5975
DIFF: https://github.com/llvm/llvm-project/commit/930421e18c51c2e8eaf7ea92fcbfc4b1eabc5975.diff
LOG: [unittests][llvm-exegesis] Remove build warnings [NFCI]
Remove the warning caused by a missing field initializer.
The field is `StartAtCycle` of `struct MCWriteProcResEntry`.
It has been set to the default `StartAtCycle = 0`.
Differential Revision: https://reviews.llvm.org/D150569
Added:
Modified:
llvm/unittests/tools/llvm-exegesis/PowerPC/AnalysisTest.cpp
llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
Removed:
################################################################################
diff --git a/llvm/unittests/tools/llvm-exegesis/PowerPC/AnalysisTest.cpp b/llvm/unittests/tools/llvm-exegesis/PowerPC/AnalysisTest.cpp
index 6d0c09df3a489..1aca1cb974a63 100644
--- a/llvm/unittests/tools/llvm-exegesis/PowerPC/AnalysisTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/PowerPC/AnalysisTest.cpp
@@ -71,19 +71,19 @@ class PPCAnalysisTest : public ::testing::Test {
TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_2ALU) {
const auto Pressure =
- computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUIdx, 2}});
+ computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUIdx, 2, 0}});
EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUIdx, 2.0)));
}
TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_1ALUE) {
const auto Pressure =
- computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUEIdx, 2}});
+ computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUEIdx, 2, 0}});
EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUEIdx, 2.0)));
}
TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_1ALU1IPAGEN) {
- const auto Pressure =
- computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUIdx, 1}, {IPAGENIdx, 1}});
+ const auto Pressure = computeIdealizedProcResPressure(
+ STI->getSchedModel(), {{ALUIdx, 1, 0}, {IPAGENIdx, 1, 0}});
EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUIdx, 1.0),Pair(IPAGENIdx, 1)));
}
} // namespace
diff --git a/llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
index cc13306ac9409..97b9a1997e0d0 100644
--- a/llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
@@ -65,20 +65,20 @@ class X86SchedClassResolutionTest : public X86TestBase {
TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P0) {
const auto Pressure =
- computeIdealizedProcResPressure(STI.getSchedModel(), {{P0Idx, 2}});
+ computeIdealizedProcResPressure(STI.getSchedModel(), {{P0Idx, 2, 0}});
EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(P0Idx, 2.0)));
}
TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05) {
const auto Pressure =
- computeIdealizedProcResPressure(STI.getSchedModel(), {{P05Idx, 2}});
+ computeIdealizedProcResPressure(STI.getSchedModel(), {{P05Idx, 2, 0}});
EXPECT_THAT(Pressure,
UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P5Idx, 1.0)));
}
TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05_2P0156) {
const auto Pressure = computeIdealizedProcResPressure(
- STI.getSchedModel(), {{P05Idx, 2}, {P0156Idx, 2}});
+ STI.getSchedModel(), {{P05Idx, 2, 0}, {P0156Idx, 2, 0}});
EXPECT_THAT(Pressure,
UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
@@ -87,7 +87,7 @@ TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05_2P0156)
TEST_F(X86SchedClassResolutionTest,
ComputeIdealizedProcResPressure_1P1_1P05_2P0156) {
const auto Pressure = computeIdealizedProcResPressure(
- STI.getSchedModel(), {{P1Idx, 1}, {P05Idx, 1}, {P0156Idx, 2}});
+ STI.getSchedModel(), {{P1Idx, 1, 0}, {P05Idx, 1, 0}, {P0156Idx, 2, 0}});
EXPECT_THAT(Pressure,
UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
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