[PATCH] D150569: [unittests][llvm-exegesis] Remove build warnings [NFCI]

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli created this revision.
fpetrogalli added a reviewer: fhahn.
Herald added subscribers: StephenFan, mstojanovic, nemanjai.
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Remove the warning caused by a missing field initializer.

The field is `StartAtCycle` of `struct MCWriteProcResEntry`.

It has been set to the default `StartAtCycle = 0`.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150569

Files:
  llvm/unittests/tools/llvm-exegesis/PowerPC/AnalysisTest.cpp
  llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp


Index: llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
===================================================================
--- llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
+++ llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
@@ -65,20 +65,20 @@
 
 TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P0) {
   const auto Pressure =
-      computeIdealizedProcResPressure(STI.getSchedModel(), {{P0Idx, 2}});
+      computeIdealizedProcResPressure(STI.getSchedModel(), {{P0Idx, 2, 0}});
   EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(P0Idx, 2.0)));
 }
 
 TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05) {
   const auto Pressure =
-      computeIdealizedProcResPressure(STI.getSchedModel(), {{P05Idx, 2}});
+      computeIdealizedProcResPressure(STI.getSchedModel(), {{P05Idx, 2, 0}});
   EXPECT_THAT(Pressure,
               UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P5Idx, 1.0)));
 }
 
 TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05_2P0156) {
   const auto Pressure = computeIdealizedProcResPressure(
-      STI.getSchedModel(), {{P05Idx, 2}, {P0156Idx, 2}});
+      STI.getSchedModel(), {{P05Idx, 2, 0}, {P0156Idx, 2, 0}});
   EXPECT_THAT(Pressure,
               UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
                                    Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
@@ -87,7 +87,7 @@
 TEST_F(X86SchedClassResolutionTest,
        ComputeIdealizedProcResPressure_1P1_1P05_2P0156) {
   const auto Pressure = computeIdealizedProcResPressure(
-      STI.getSchedModel(), {{P1Idx, 1}, {P05Idx, 1}, {P0156Idx, 2}});
+      STI.getSchedModel(), {{P1Idx, 1, 0}, {P05Idx, 1, 0}, {P0156Idx, 2, 0}});
   EXPECT_THAT(Pressure,
               UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
                                    Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
Index: llvm/unittests/tools/llvm-exegesis/PowerPC/AnalysisTest.cpp
===================================================================
--- llvm/unittests/tools/llvm-exegesis/PowerPC/AnalysisTest.cpp
+++ llvm/unittests/tools/llvm-exegesis/PowerPC/AnalysisTest.cpp
@@ -71,19 +71,19 @@
 
 TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_2ALU) {
   const auto Pressure =
-      computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUIdx, 2}});
+      computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUIdx, 2, 0}});
   EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUIdx, 2.0)));
 }
 
 TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_1ALUE) {
   const auto Pressure =
-      computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUEIdx, 2}});
+      computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUEIdx, 2, 0}});
   EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUEIdx, 2.0)));
 }
 
 TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_1ALU1IPAGEN) {
-  const auto Pressure =
-      computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUIdx, 1}, {IPAGENIdx, 1}});
+  const auto Pressure = computeIdealizedProcResPressure(
+      STI->getSchedModel(), {{ALUIdx, 1, 0}, {IPAGENIdx, 1, 0}});
   EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUIdx, 1.0),Pair(IPAGENIdx, 1)));
 }
 } // namespace


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