[PATCH] D150560: [AArch64] Avoid RegScavenger::forward in AArch64SpeculationHardening

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
foad added reviewers: arsenm, RKSimon, bogner, t.p.northover.
Herald added subscribers: StephenFan, hiraditya, kristof.beyls.
Herald added a project: All.
foad requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

RegScavenger::backward is preferred because it does not rely on accurate
kill flags.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150560

Files:
  llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp


Index: llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
+++ llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
@@ -286,18 +286,20 @@
   bool TmpRegisterNotAvailableEverywhere = false;
 
   RegScavenger RS;
-  RS.enterBasicBlock(MBB);
+  RS.enterBasicBlockEnd(MBB);
 
-  for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); I++) {
-    MachineInstr &MI = *I;
+  for (MachineBasicBlock::iterator I = MBB.end(); I != MBB.begin(); ) {
+    MachineInstr &MI = *--I;
     if (!MI.isReturn() && !MI.isCall())
       continue;
 
     // The RegScavenger represents registers available *after* the MI
     // instruction pointed to by RS.getCurrentPosition().
     // We need to have a register that is available *before* the MI is executed.
-    if (I != MBB.begin())
-      RS.forward(std::prev(I));
+    if (I == MBB.begin())
+      RS.enterBasicBlock(MBB);
+    else
+      RS.backward(std::prev(I));
     // FIXME: The below just finds *a* unused register. Maybe code could be
     // optimized more if this looks for the register that isn't used for the
     // longest time around this place, to enable more scheduling freedom. Not


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