[PATCH] D149572: [LegalizeVectorOps][AArch64][RISCV][X86] Use OpVT for ISD::SETCC in LegalizeVectorOps.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat May 13 23:33:35 PDT 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9ad9380fbcdc: [LegalizeVectorOps][AArch64][RISCV][X86] Use OpVT for ISD::SETCC in… (authored by craig.topper).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149572/new/
https://reviews.llvm.org/D149572
Files:
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/Analysis/CostModel/RISCV/rvv-cmp.ll
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