[llvm] 9ad9380 - [LegalizeVectorOps][AArch64][RISCV][X86] Use OpVT for ISD::SETCC in LegalizeVectorOps.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat May 13 23:33:27 PDT 2023
Author: Craig Topper
Date: 2023-05-13T23:33:00-07:00
New Revision: 9ad9380fbcdc247b139bd4556608616b5f031783
URL: https://github.com/llvm/llvm-project/commit/9ad9380fbcdc247b139bd4556608616b5f031783
DIFF: https://github.com/llvm/llvm-project/commit/9ad9380fbcdc247b139bd4556608616b5f031783.diff
LOG: [LegalizeVectorOps][AArch64][RISCV][X86] Use OpVT for ISD::SETCC in LegalizeVectorOps.
Previously, LegalizeVectorOps used the result VT while LegalizeDAG
used the operand VT. This patch makes them both use the operand VT.
This also makes it consistent with how the default cost model works.
I've hacked the AArch64 cost model to maintain old behavior for some
f16 vectors.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D149572
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/Analysis/CostModel/RISCV/rvv-cmp.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index faf3453ca3bb6..6c03f2d3e6298 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -302,8 +302,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
ISD::CondCode CCCode = cast<CondCodeSDNode>(Node->getOperand(3))->get();
Action = TLI.getCondCodeAction(CCCode, OpVT);
if (Action == TargetLowering::Legal)
- Action =
- TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
+ Action = TLI.getOperationAction(Node->getOpcode(), OpVT);
} else {
Action = TLI.getOperationAction(Node->getOpcode(), ValVT);
}
@@ -464,7 +463,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
ISD::CondCode CCCode = cast<CondCodeSDNode>(Node->getOperand(2))->get();
Action = TLI.getCondCodeAction(CCCode, OpVT);
if (Action == TargetLowering::Legal)
- Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
+ Action = TLI.getOperationAction(Node->getOpcode(), OpVT);
break;
}
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 093d7984e7cd2..95b82f6a3b880 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -716,7 +716,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
setOperationAction(ISD::FROUND, MVT::v4f16, Expand);
setOperationAction(ISD::FROUNDEVEN, MVT::v4f16, Expand);
setOperationAction(ISD::FMA, MVT::v4f16, Expand);
- setOperationAction(ISD::SETCC, MVT::v4f16, Expand);
+ setOperationAction(ISD::SETCC, MVT::v4f16, Custom);
setOperationAction(ISD::BR_CC, MVT::v4f16, Expand);
setOperationAction(ISD::SELECT, MVT::v4f16, Expand);
setOperationAction(ISD::SELECT_CC, MVT::v4f16, Expand);
@@ -1053,7 +1053,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
// FIXME: v1f64 shouldn't be legal if we can avoid it, because it leads to
// silliness like this:
for (auto Op :
- {ISD::SELECT, ISD::SELECT_CC, ISD::SETCC,
+ {ISD::SELECT, ISD::SELECT_CC,
ISD::BR_CC, ISD::FADD, ISD::FSUB,
ISD::FMUL, ISD::FDIV, ISD::FMA,
ISD::FNEG, ISD::FABS, ISD::FCEIL,
@@ -1415,6 +1415,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
setOperationAction(ISD::MLOAD, VT, Custom);
setOperationAction(ISD::SPLAT_VECTOR, VT, Legal);
setOperationAction(ISD::SELECT, VT, Custom);
+ setOperationAction(ISD::SETCC, VT, Custom);
setOperationAction(ISD::FADD, VT, Custom);
setOperationAction(ISD::FCOPYSIGN, VT, Custom);
setOperationAction(ISD::FDIV, VT, Custom);
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index ffefb94d5dbd2..91224cedea8b0 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -2584,6 +2584,24 @@ InstructionCost AArch64TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
return Entry->Cost;
}
}
+
+ // Cost vXf16 FCmp without FP16 support as if it is scalarized.
+ // FIXME: This isn't correct, but matches previous behavior.
+ if (isa<FixedVectorType>(ValTy) && ISD == ISD::SETCC &&
+ ValTy->getScalarType()->isHalfTy() && !ST->hasFullFP16()) {
+ unsigned Num = cast<FixedVectorType>(ValTy)->getNumElements();
+ if (CondTy)
+ CondTy = CondTy->getScalarType();
+ InstructionCost Cost = getCmpSelInstrCost(
+ Opcode, ValTy->getScalarType(), CondTy, VecPred, CostKind, I);
+
+ // Return the cost of multiple scalar invocation plus the cost of
+ // inserting and extracting the values.
+ return getScalarizationOverhead(cast<FixedVectorType>(ValTy), /*Insert*/ true,
+ /*Extract*/ false, CostKind) +
+ Num * Cost;
+ }
+
// The base case handles scalable vectors fine for now, since it treats the
// cost as 1 * legalization cost.
return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index d4df9b178fdfb..064a283d1cc4e 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -644,8 +644,6 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::VECTOR_REVERSE, VT, Custom);
- setOperationAction({ISD::STRICT_FSETCC, ISD::STRICT_FSETCCS}, VT, Custom);
-
setOperationPromotedToType(
ISD::VECTOR_SPLICE, VT,
MVT::getVectorVT(MVT::i8, VT.getVectorElementCount()));
@@ -905,10 +903,6 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::SETCC, VT, Custom);
- if (VT.getVectorElementType() == MVT::i1)
- setOperationAction({ISD::STRICT_FSETCC, ISD::STRICT_FSETCCS}, VT,
- Custom);
-
setOperationAction(ISD::SELECT, VT, Custom);
setOperationAction(ISD::TRUNCATE, VT, Custom);
@@ -1055,6 +1049,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setCondCodeAction(VFPCCToExpand, VT, Expand);
+ setOperationAction(ISD::SETCC, VT, Custom);
setOperationAction({ISD::VSELECT, ISD::SELECT}, VT, Custom);
setOperationAction(ISD::SELECT_CC, VT, Expand);
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index e709474382e71..2700453cd1277 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -399,9 +399,6 @@ SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM,
// Map SETCCs onto one of VCE, VCH or VCHL, swapping the operands
// and inverting the result as necessary.
setOperationAction(ISD::SETCC, VT, Custom);
- setOperationAction(ISD::STRICT_FSETCC, VT, Custom);
- if (Subtarget.hasVectorEnhancements1())
- setOperationAction(ISD::STRICT_FSETCCS, VT, Custom);
}
}
@@ -537,6 +534,15 @@ SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::STRICT_FCEIL, MVT::v2f64, Legal);
setOperationAction(ISD::STRICT_FTRUNC, MVT::v2f64, Legal);
setOperationAction(ISD::STRICT_FROUND, MVT::v2f64, Legal);
+
+ setOperationAction(ISD::SETCC, MVT::v2f64, Custom);
+ setOperationAction(ISD::SETCC, MVT::v4f32, Custom);
+ setOperationAction(ISD::STRICT_FSETCC, MVT::v2f64, Custom);
+ setOperationAction(ISD::STRICT_FSETCC, MVT::v4f32, Custom);
+ if (Subtarget.hasVectorEnhancements1()) {
+ setOperationAction(ISD::STRICT_FSETCCS, MVT::v2f64, Custom);
+ setOperationAction(ISD::STRICT_FSETCCS, MVT::v4f32, Custom);
+ }
}
// The vector enhancements facility 1 has instructions for these.
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 2baf59d6a7cba..49fe440e9238d 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1117,8 +1117,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
for (auto VT : { MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64 }) {
setOperationAction(ISD::SETCC, VT, Custom);
- setOperationAction(ISD::STRICT_FSETCC, VT, Custom);
- setOperationAction(ISD::STRICT_FSETCCS, VT, Custom);
setOperationAction(ISD::CTPOP, VT, Custom);
setOperationAction(ISD::ABS, VT, Custom);
@@ -1128,6 +1126,13 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setCondCodeAction(ISD::SETLE, VT, Custom);
}
+ setOperationAction(ISD::SETCC, MVT::v2f64, Custom);
+ setOperationAction(ISD::SETCC, MVT::v4f32, Custom);
+ setOperationAction(ISD::STRICT_FSETCC, MVT::v2f64, Custom);
+ setOperationAction(ISD::STRICT_FSETCC, MVT::v4f32, Custom);
+ setOperationAction(ISD::STRICT_FSETCCS, MVT::v2f64, Custom);
+ setOperationAction(ISD::STRICT_FSETCCS, MVT::v4f32, Custom);
+
for (auto VT : { MVT::v16i8, MVT::v8i16, MVT::v4i32 }) {
setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom);
setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
@@ -1477,8 +1482,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
for (auto VT : { MVT::v32i8, MVT::v16i16, MVT::v8i32, MVT::v4i64 }) {
setOperationAction(ISD::SETCC, VT, Custom);
- setOperationAction(ISD::STRICT_FSETCC, VT, Custom);
- setOperationAction(ISD::STRICT_FSETCCS, VT, Custom);
setOperationAction(ISD::CTPOP, VT, Custom);
setOperationAction(ISD::CTLZ, VT, Custom);
@@ -1488,6 +1491,13 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setCondCodeAction(ISD::SETLE, VT, Custom);
}
+ setOperationAction(ISD::SETCC, MVT::v4f64, Custom);
+ setOperationAction(ISD::SETCC, MVT::v8f32, Custom);
+ setOperationAction(ISD::STRICT_FSETCC, MVT::v4f64, Custom);
+ setOperationAction(ISD::STRICT_FSETCC, MVT::v8f32, Custom);
+ setOperationAction(ISD::STRICT_FSETCCS, MVT::v4f64, Custom);
+ setOperationAction(ISD::STRICT_FSETCCS, MVT::v8f32, Custom);
+
if (Subtarget.hasAnyFMA()) {
for (auto VT : { MVT::f32, MVT::f64, MVT::v4f32, MVT::v8f32,
MVT::v2f64, MVT::v4f64 }) {
@@ -1683,8 +1693,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
for (auto VT : { MVT::v2i1, MVT::v4i1, MVT::v8i1, MVT::v16i1 }) {
setOperationAction(ISD::SETCC, VT, Custom);
- setOperationAction(ISD::STRICT_FSETCC, VT, Custom);
- setOperationAction(ISD::STRICT_FSETCCS, VT, Custom);
setOperationAction(ISD::SELECT, VT, Custom);
setOperationAction(ISD::TRUNCATE, VT, Custom);
@@ -1868,6 +1876,14 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setCondCodeAction(ISD::SETLT, VT, Custom);
setCondCodeAction(ISD::SETLE, VT, Custom);
}
+
+ setOperationAction(ISD::SETCC, MVT::v8f64, Custom);
+ setOperationAction(ISD::SETCC, MVT::v16f32, Custom);
+ setOperationAction(ISD::STRICT_FSETCC, MVT::v8f64, Custom);
+ setOperationAction(ISD::STRICT_FSETCC, MVT::v16f32, Custom);
+ setOperationAction(ISD::STRICT_FSETCCS, MVT::v8f64, Custom);
+ setOperationAction(ISD::STRICT_FSETCCS, MVT::v16f32, Custom);
+
for (auto VT : { MVT::v16i32, MVT::v8i64 }) {
setOperationAction(ISD::SMAX, VT, Legal);
setOperationAction(ISD::UMAX, VT, Legal);
@@ -1875,8 +1891,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::UMIN, VT, Legal);
setOperationAction(ISD::ABS, VT, Legal);
setOperationAction(ISD::CTPOP, VT, Custom);
- setOperationAction(ISD::STRICT_FSETCC, VT, Custom);
- setOperationAction(ISD::STRICT_FSETCCS, VT, Custom);
}
for (auto VT : { MVT::v64i8, MVT::v32i16 }) {
@@ -2130,6 +2144,10 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::FCOPYSIGN, VT, Custom);
setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
+
+ setOperationAction(ISD::SETCC, VT, Custom);
+ setOperationAction(ISD::STRICT_FSETCC, VT, Custom);
+ setOperationAction(ISD::STRICT_FSETCCS, VT, Custom);
};
// AVX512_FP16 scalar operations
@@ -2138,9 +2156,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::STRICT_FREM, MVT::f16, Promote);
setOperationAction(ISD::SELECT_CC, MVT::f16, Expand);
setOperationAction(ISD::BR_CC, MVT::f16, Expand);
- setOperationAction(ISD::SETCC, MVT::f16, Custom);
- setOperationAction(ISD::STRICT_FSETCC, MVT::f16, Custom);
- setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom);
setOperationAction(ISD::STRICT_FROUND, MVT::f16, Promote);
setOperationAction(ISD::FROUNDEVEN, MVT::f16, Legal);
setOperationAction(ISD::STRICT_FROUNDEVEN, MVT::f16, Legal);
@@ -2192,9 +2207,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setLoadExtAction(ISD::EXTLOAD, MVT::v8f64, MVT::v8f16, Legal);
setLoadExtAction(ISD::EXTLOAD, MVT::v16f32, MVT::v16f16, Legal);
-
- setOperationAction(ISD::STRICT_FSETCC, MVT::v32i1, Custom);
- setOperationAction(ISD::STRICT_FSETCCS, MVT::v32i1, Custom);
}
if (Subtarget.hasVLX()) {
diff --git a/llvm/test/Analysis/CostModel/RISCV/rvv-cmp.ll b/llvm/test/Analysis/CostModel/RISCV/rvv-cmp.ll
index b66165d7edaf0..7f6fa551f35c1 100644
--- a/llvm/test/Analysis/CostModel/RISCV/rvv-cmp.ll
+++ b/llvm/test/Analysis/CostModel/RISCV/rvv-cmp.ll
@@ -938,27 +938,27 @@ define void @fcmp_oeq() {
define void @fcmp_one() {
; CHECK-LABEL: 'fcmp_one'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f16 = fcmp one <2 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f16 = fcmp one <4 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f16 = fcmp one <8 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f16 = fcmp one <16 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16 = fcmp one <2 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16 = fcmp one <4 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16 = fcmp one <8 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16 = fcmp one <16 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16 = fcmp one <vscale x 1 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16 = fcmp one <vscale x 2 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16 = fcmp one <vscale x 4 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16 = fcmp one <vscale x 8 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16 = fcmp one <vscale x 16 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f32 = fcmp one <2 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f32 = fcmp one <4 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f32 = fcmp one <8 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f32 = fcmp one <16 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32 = fcmp one <2 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32 = fcmp one <4 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32 = fcmp one <8 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32 = fcmp one <16 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32 = fcmp one <vscale x 1 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32 = fcmp one <vscale x 2 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32 = fcmp one <vscale x 4 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32 = fcmp one <vscale x 8 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32 = fcmp one <vscale x 16 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f64 = fcmp one <2 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f64 = fcmp one <4 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f64 = fcmp one <8 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64 = fcmp one <2 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64 = fcmp one <4 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64 = fcmp one <8 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64 = fcmp one <vscale x 1 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64 = fcmp one <vscale x 2 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64 = fcmp one <vscale x 4 x double> undef, undef
@@ -1253,27 +1253,27 @@ define void @fcmp_oge() {
define void @fcmp_ueq() {
; CHECK-LABEL: 'fcmp_ueq'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f16 = fcmp ueq <2 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f16 = fcmp ueq <4 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f16 = fcmp ueq <8 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f16 = fcmp ueq <16 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16 = fcmp ueq <2 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16 = fcmp ueq <4 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16 = fcmp ueq <8 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16 = fcmp ueq <16 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16 = fcmp ueq <vscale x 1 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16 = fcmp ueq <vscale x 2 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16 = fcmp ueq <vscale x 4 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16 = fcmp ueq <vscale x 8 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16 = fcmp ueq <vscale x 16 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f32 = fcmp ueq <2 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f32 = fcmp ueq <4 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f32 = fcmp ueq <8 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f32 = fcmp ueq <16 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32 = fcmp ueq <2 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32 = fcmp ueq <4 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32 = fcmp ueq <8 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32 = fcmp ueq <16 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32 = fcmp ueq <vscale x 1 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32 = fcmp ueq <vscale x 2 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32 = fcmp ueq <vscale x 4 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32 = fcmp ueq <vscale x 8 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32 = fcmp ueq <vscale x 16 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f64 = fcmp ueq <2 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f64 = fcmp ueq <4 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f64 = fcmp ueq <8 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64 = fcmp ueq <2 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64 = fcmp ueq <4 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64 = fcmp ueq <8 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64 = fcmp ueq <vscale x 1 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64 = fcmp ueq <vscale x 2 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64 = fcmp ueq <vscale x 4 x double> undef, undef
@@ -1379,27 +1379,27 @@ define void @fcmp_une() {
define void @fcmp_ult() {
; CHECK-LABEL: 'fcmp_ult'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f16 = fcmp ult <2 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f16 = fcmp ult <4 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f16 = fcmp ult <8 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f16 = fcmp ult <16 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16 = fcmp ult <2 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16 = fcmp ult <4 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16 = fcmp ult <8 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16 = fcmp ult <16 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16 = fcmp ult <vscale x 1 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16 = fcmp ult <vscale x 2 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16 = fcmp ult <vscale x 4 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16 = fcmp ult <vscale x 8 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16 = fcmp ult <vscale x 16 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f32 = fcmp ult <2 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f32 = fcmp ult <4 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f32 = fcmp ult <8 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f32 = fcmp ult <16 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32 = fcmp ult <2 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32 = fcmp ult <4 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32 = fcmp ult <8 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32 = fcmp ult <16 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32 = fcmp ult <vscale x 1 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32 = fcmp ult <vscale x 2 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32 = fcmp ult <vscale x 4 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32 = fcmp ult <vscale x 8 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32 = fcmp ult <vscale x 16 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f64 = fcmp ult <2 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f64 = fcmp ult <4 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f64 = fcmp ult <8 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64 = fcmp ult <2 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64 = fcmp ult <4 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64 = fcmp ult <8 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64 = fcmp ult <vscale x 1 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64 = fcmp ult <vscale x 2 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64 = fcmp ult <vscale x 4 x double> undef, undef
@@ -1442,27 +1442,27 @@ define void @fcmp_ult() {
define void @fcmp_ule() {
; CHECK-LABEL: 'fcmp_ule'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f16 = fcmp ule <2 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f16 = fcmp ule <4 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f16 = fcmp ule <8 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f16 = fcmp ule <16 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16 = fcmp ule <2 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16 = fcmp ule <4 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16 = fcmp ule <8 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16 = fcmp ule <16 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16 = fcmp ule <vscale x 1 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16 = fcmp ule <vscale x 2 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16 = fcmp ule <vscale x 4 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16 = fcmp ule <vscale x 8 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16 = fcmp ule <vscale x 16 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f32 = fcmp ule <2 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f32 = fcmp ule <4 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f32 = fcmp ule <8 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f32 = fcmp ule <16 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32 = fcmp ule <2 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32 = fcmp ule <4 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32 = fcmp ule <8 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32 = fcmp ule <16 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32 = fcmp ule <vscale x 1 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32 = fcmp ule <vscale x 2 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32 = fcmp ule <vscale x 4 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32 = fcmp ule <vscale x 8 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32 = fcmp ule <vscale x 16 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f64 = fcmp ule <2 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f64 = fcmp ule <4 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f64 = fcmp ule <8 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64 = fcmp ule <2 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64 = fcmp ule <4 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64 = fcmp ule <8 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64 = fcmp ule <vscale x 1 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64 = fcmp ule <vscale x 2 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64 = fcmp ule <vscale x 4 x double> undef, undef
@@ -1505,27 +1505,27 @@ define void @fcmp_ule() {
define void @fcmp_ugt() {
; CHECK-LABEL: 'fcmp_ugt'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f16 = fcmp ugt <2 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f16 = fcmp ugt <4 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f16 = fcmp ugt <8 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f16 = fcmp ugt <16 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16 = fcmp ugt <2 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16 = fcmp ugt <4 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16 = fcmp ugt <8 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16 = fcmp ugt <16 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16 = fcmp ugt <vscale x 1 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16 = fcmp ugt <vscale x 2 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16 = fcmp ugt <vscale x 4 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16 = fcmp ugt <vscale x 8 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16 = fcmp ugt <vscale x 16 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f32 = fcmp ugt <2 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f32 = fcmp ugt <4 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f32 = fcmp ugt <8 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f32 = fcmp ugt <16 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32 = fcmp ugt <2 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32 = fcmp ugt <4 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32 = fcmp ugt <8 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32 = fcmp ugt <16 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32 = fcmp ugt <vscale x 1 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32 = fcmp ugt <vscale x 2 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32 = fcmp ugt <vscale x 4 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32 = fcmp ugt <vscale x 8 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32 = fcmp ugt <vscale x 16 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f64 = fcmp ugt <2 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f64 = fcmp ugt <4 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f64 = fcmp ugt <8 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64 = fcmp ugt <2 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64 = fcmp ugt <4 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64 = fcmp ugt <8 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64 = fcmp ugt <vscale x 1 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64 = fcmp ugt <vscale x 2 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64 = fcmp ugt <vscale x 4 x double> undef, undef
@@ -1568,27 +1568,27 @@ define void @fcmp_ugt() {
define void @fcmp_uge() {
; CHECK-LABEL: 'fcmp_uge'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f16 = fcmp uge <2 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f16 = fcmp uge <4 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f16 = fcmp uge <8 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f16 = fcmp uge <16 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16 = fcmp uge <2 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16 = fcmp uge <4 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16 = fcmp uge <8 x half> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16 = fcmp uge <16 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16 = fcmp uge <vscale x 1 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16 = fcmp uge <vscale x 2 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16 = fcmp uge <vscale x 4 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16 = fcmp uge <vscale x 8 x half> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16 = fcmp uge <vscale x 16 x half> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f32 = fcmp uge <2 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f32 = fcmp uge <4 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f32 = fcmp uge <8 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %v16f32 = fcmp uge <16 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32 = fcmp uge <2 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32 = fcmp uge <4 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32 = fcmp uge <8 x float> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32 = fcmp uge <16 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32 = fcmp uge <vscale x 1 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32 = fcmp uge <vscale x 2 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32 = fcmp uge <vscale x 4 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32 = fcmp uge <vscale x 8 x float> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32 = fcmp uge <vscale x 16 x float> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v2f64 = fcmp uge <2 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4f64 = fcmp uge <4 x double> undef, undef
-; CHECK-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v8f64 = fcmp uge <8 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64 = fcmp uge <2 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64 = fcmp uge <4 x double> undef, undef
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64 = fcmp uge <8 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64 = fcmp uge <vscale x 1 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64 = fcmp uge <vscale x 2 x double> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64 = fcmp uge <vscale x 4 x double> undef, undef
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