[PATCH] D149196: [SelectionDAG] Use `computeKnownBits` if `Op` is not recognized by `isKnownNeverZero`

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n updated this revision to Diff 521912.
goldstein.w.n added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149196/new/

https://reviews.llvm.org/D149196

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/ARM/cttz_vector.ll


Index: llvm/test/CodeGen/ARM/cttz_vector.ll
===================================================================
--- llvm/test/CodeGen/ARM/cttz_vector.ll
+++ llvm/test/CodeGen/ARM/cttz_vector.ll
@@ -65,14 +65,13 @@
 ; CHECK-LABEL: test_v4i8:
 ; CHECK:       @ %bb.0:
 ; CHECK-NEXT:    vld1.32 {d16[0]}, [r0:32]
-; CHECK-NEXT:    vmov.i16 d19, #0x1
 ; CHECK-NEXT:    vmovl.u8 q8, d16
 ; CHECK-NEXT:    vorr.i16 d16, #0x100
 ; CHECK-NEXT:    vneg.s16 d18, d16
 ; CHECK-NEXT:    vand d16, d16, d18
-; CHECK-NEXT:    vsub.i16 d16, d16, d19
-; CHECK-NEXT:    vcnt.8 d16, d16
-; CHECK-NEXT:    vpaddl.u8 d16, d16
+; CHECK-NEXT:    vmov.i16 d17, #0xf
+; CHECK-NEXT:    vclz.i16 d16, d16
+; CHECK-NEXT:    vsub.i16 d16, d17, d16
 ; CHECK-NEXT:    vuzp.8 d16, d17
 ; CHECK-NEXT:    vst1.32 {d16[0]}, [r0:32]
 ; CHECK-NEXT:    bx lr
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5064,7 +5064,7 @@
     break;
   }
 
-  return false;
+  return computeKnownBits(Op, Depth).isNonZero();
 }
 
 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {


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