[PATCH] D149873: [AMDGPU][GFX908] IndirectCopyToAGPR: Confirm modified register is dst reg of accvgpr_write
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 12 10:14:52 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:588-589
+ // The 0th operand of ACCVGPR_WRITE on gfx908 will always be the register
+ // that potentially contains the bits we are interested in
+ assert(Def->getOperand(0).isReg());
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This comment is also stating the obvious
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Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:592
+ // that potentially contains the bits we are interested in
+ if (!Def->getOperand(0).isReg())
+ break;
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arsenm wrote:
> This would be illegal, a def always must be a register
The assert is also redundant, getReg does that for you
================
Comment at: llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir:1005
+
+
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arsenm wrote:
> Extra whitespace change
Still extra whitespace change
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149873/new/
https://reviews.llvm.org/D149873
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