[PATCH] D150438: [LLVM][Uniformity] Improve detection of uniform registers

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2879
+  // if available.
+  auto *RC = MRI.getRegClassOrNull(Reg);
+  if (!RC)
----------------
Can combine these two queries into getRegClassOrRegBank


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2891
+  // work, but it is usually safe to assume a uniform SGPR at this point.
+  auto RegType = MRI.getType(Reg);
+  if (!RegType.isValid())
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Just use LLT instead of auto, it's even shorter 


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2892-2893
+  auto RegType = MRI.getType(Reg);
+  if (!RegType.isValid())
+    return true;
+
----------------
You should just be able to do equality without pre-checking for a valid type. Just MRI.getType() != LLT::scalar(1) should be enough 


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2895
+
+  assert(RegType.isScalar() && "non-scalar types are divergent");
+  return RegType != LLT::scalar(1);
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Don't see why this needs to be an assert, equality with s1 should be adequate 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150438/new/

https://reviews.llvm.org/D150438