[PATCH] D150440: [X86][MC] Optimize more instructions from VEX3 to VEX2 and fix the incorrect control flow in X86MCInstLower

Kan Shengchen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 12 07:15:50 PDT 2023


skan updated this revision to Diff 521644.
skan added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150440/new/

https://reviews.llvm.org/D150440

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.h
  llvm/lib/Target/X86/X86MCInstLower.cpp
  llvm/test/MC/X86/x86_64-avx-encoding.s
  llvm/test/tools/llvm-mca/X86/show-encoding.s

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