[PATCH] D149873: [AMDGPU][GFX908] IndirectCopyToAGPR: Confirm modified register is dst reg of accvgpr_write
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 12 06:28:51 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:592
+ // that potentially contains the bits we are interested in
+ if (!Def->getOperand(0).isReg())
+ break;
----------------
This would be illegal, a def always must be a register
================
Comment at: llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir:926-929
+ $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1
+ $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit-def $agpr1_agpr2
+ $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit $agpr0_agpr1
+ $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec, implicit-def $agpr1_agpr2
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Should precommit this test to show the diff here
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Comment at: llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir:1005
+
+
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Extra whitespace change
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D149873/new/
https://reviews.llvm.org/D149873
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