[PATCH] D150440: [X86][MC] Optimize more instructions from VEX3 to VEX2 and fix the incorrect control flow in X86MCInstLower

[Kan Shengchen via Phabricator via llvm-commits]

skan created this revision.
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`X86MCInstLower::Lower` has a huge switch-cases, from which D150068 <https://reviews.llvm.org/D150068> removed
`VMOVSS`. It caused the unoptimized VMOVSS to wrongly fall
to the default label. The default label exchanged the 1st and 2nd
operand, but we should exchange the 0th and 2nd operand.

In this patch, we move the code in the default lable about "VEX3 to
VEX2" to the function `X86::optimizeInstFromVEX3ToVEX2` to fix the bug.

Since the function is shared, a side effect is that more encoding
optimizations are done on the Asmparser side. Considering we already
use reverse-encoding for optimization in AsmParser before this patch,
I believe the change is positive and expected.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150440

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.h
  llvm/lib/Target/X86/X86MCInstLower.cpp
  llvm/test/MC/X86/x86_64-avx-encoding.s
  llvm/test/tools/llvm-mca/X86/show-encoding.s

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