[PATCH] D146737: [AMDGPU] Trim zero components from buffer and image stores

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

Code looks good now, thanks.



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Comment at: llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll:4554
 ; CHECK-NEXT:  main_body:
-; CHECK-NEXT:    call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> [[VDATA:%.*]], i32 15, i32 [[S:%.*]], <8 x i32> [[RSRC:%.*]], i32 0, i32 0)
+; CHECK-NEXT:    call void @llvm.amdgcn.image.store.mip.1d.v4f32.i32(<4 x float> [[VDATA:%.*]], i32 15, i32 [[S:%.*]], i32 0, <8 x i32> [[RSRC:%.*]], i32 0, i32 0)
 ; CHECK-NEXT:    ret void
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This looks like we have lost an optimization that converts the "mip" form to the non-"mip" form.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146737/new/

https://reviews.llvm.org/D146737