[PATCH] D134599: [RISCV] Readjusting the framestack for Zcmp

[Yeting Kuo via Phabricator via llvm-commits]

fakepaper56 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:395
+static SmallVector<CalleeSavedInfo, 8>
+getNonPushPopCSI(const MachineFunction &MF,
+                 const TargetRegisterInfo *TRI,
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Is it better to support Zcmp for `RISCVRegisterInfo::hasReservedSpillSlot` and use a more general name for `getNonLibcallCSI`.


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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:187
+// Registers saveable by PUSH/POP instruction in Zcmp extension
+def PGPR : RegisterClass<"RISCV", [XLenVT], 32, (add
+    (sequence "X%u", 8, 9),
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I suggest to add X26 to PGPR to make Zcmp work for spill register are {ra, s0 - 10}.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D134599/new/

https://reviews.llvm.org/D134599