[llvm] 0833a9a - [test] Use autogenerated assertions
Serge Pavlov via llvm-commits
llvm-commits at lists.llvm.org
Thu May 11 23:33:53 PDT 2023
Author: Serge Pavlov
Date: 2023-05-12T13:32:59+07:00
New Revision: 0833a9a7962892584a3c2728a710300a3a2c7169
URL: https://github.com/llvm/llvm-project/commit/0833a9a7962892584a3c2728a710300a3a2c7169
DIFF: https://github.com/llvm/llvm-project/commit/0833a9a7962892584a3c2728a710300a3a2c7169.diff
LOG: [test] Use autogenerated assertions
Added:
Modified:
llvm/test/CodeGen/ARM/fpenv.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/ARM/fpenv.ll b/llvm/test/CodeGen/ARM/fpenv.ll
index 30562cf89111..6ccf4cd84da8 100644
--- a/llvm/test/CodeGen/ARM/fpenv.ll
+++ b/llvm/test/CodeGen/ARM/fpenv.ll
@@ -1,69 +1,65 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=arm-eabi -float-abi=soft -mattr=+vfp2 %s -o - | FileCheck %s
define void @func_02(i32 %rm) {
+; CHECK-LABEL: func_02:
+; CHECK: @ %bb.0:
+; CHECK-NEXT: vmrs r1, fpscr
+; CHECK-NEXT: sub r0, r0, #1
+; CHECK-NEXT: and r0, r0, #3
+; CHECK-NEXT: bic r1, r1, #12582912
+; CHECK-NEXT: orr r0, r1, r0, lsl #22
+; CHECK-NEXT: vmsr fpscr, r0
+; CHECK-NEXT: mov pc, lr
call void @llvm.set.rounding(i32 %rm)
ret void
}
-; CHECK-LABEL: func_02:
-; CHECK: vmrs r1, fpscr
-; CHECK: sub r0, r0, #1
-; CHECK: and r0, r0, #3
-; CHECK: bic r1, r1, #12582912
-; CHECK: orr r0, r1, r0, lsl #22
-; CHECK: vmsr fpscr, r0
-; CHECK: mov pc, lr
-
-
define void @func_03() {
+; CHECK-LABEL: func_03:
+; CHECK: @ %bb.0:
+; CHECK-NEXT: vmrs r0, fpscr
+; CHECK-NEXT: orr r0, r0, #12582912
+; CHECK-NEXT: vmsr fpscr, r0
+; CHECK-NEXT: mov pc, lr
call void @llvm.set.rounding(i32 0)
ret void
}
-; CHECK-LABEL: func_03
-; CHECK: vmrs r0, fpscr
-; CHECK: orr r0, r0, #12582912
-; CHECK: vmsr fpscr, r0
-; CHECK: mov pc, lr
-
-
define void @func_04() {
+; CHECK-LABEL: func_04:
+; CHECK: @ %bb.0:
+; CHECK-NEXT: vmrs r0, fpscr
+; CHECK-NEXT: bic r0, r0, #12582912
+; CHECK-NEXT: vmsr fpscr, r0
+; CHECK-NEXT: mov pc, lr
call void @llvm.set.rounding(i32 1)
ret void
}
-; CHECK-LABEL: func_04
-; CHECK: vmrs r0, fpscr
-; CHECK: bic r0, r0, #12582912
-; CHECK: vmsr fpscr, r0
-; CHECK: mov pc, lr
-
-
define void @func_05() {
+; CHECK-LABEL: func_05:
+; CHECK: @ %bb.0:
+; CHECK-NEXT: vmrs r0, fpscr
+; CHECK-NEXT: bic r0, r0, #12582912
+; CHECK-NEXT: orr r0, r0, #4194304
+; CHECK-NEXT: vmsr fpscr, r0
+; CHECK-NEXT: mov pc, lr
call void @llvm.set.rounding(i32 2)
ret void
}
-
-; CHECK-LABEL: func_05
-; CHECK: vmrs r0, fpscr
-; CHECK: bic r0, r0, #12582912
-; CHECK: orr r0, r0, #4194304
-; CHECK: vmsr fpscr, r0
-; CHECK: mov pc, lr
-
-
define void @func_06() {
+; CHECK-LABEL: func_06:
+; CHECK: @ %bb.0:
+; CHECK-NEXT: vmrs r0, fpscr
+; CHECK-NEXT: bic r0, r0, #12582912
+; CHECK-NEXT: orr r0, r0, #8388608
+; CHECK-NEXT: vmsr fpscr, r0
+; CHECK-NEXT: mov pc, lr
call void @llvm.set.rounding(i32 3)
ret void
}
-; CHECK-LABEL: func_06
-; CHECK: vmrs r0, fpscr
-; CHECK: bic r0, r0, #12582912
-; CHECK: orr r0, r0, #8388608
-; CHECK: vmsr fpscr, r0
-; CHECK: mov pc, lr
-
declare void @llvm.set.rounding(i32)
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