[PATCH] D150415: [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp

[Xinlong Wu via Phabricator via llvm-commits]

VincentWu created this revision.
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This patch adds a pass to generate `cm.mvsa01` & `cm.mva01s`.

RISCVMoveOptimizer.cpp which combines two mv inst into one cm.mva01s or cm.mva01s.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150415

Files:
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/RISCV.h
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVMoveOptimizer.cpp
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/O0-pipeline.ll
  llvm/test/CodeGen/RISCV/O3-pipeline.ll
  llvm/test/CodeGen/RISCV/cm_mvas_mvsa.ll

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