[PATCH] D149021: [TTI][ASAN] Introduce TTI::getInterestingMemoryOperand and basic RISC-V support.
Yeting Kuo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 11 18:31:20 PDT 2023
fakepaper56 updated this revision to Diff 521514.
fakepaper56 added a comment.
Rebase and ping.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149021/new/
https://reviews.llvm.org/D149021
Files:
llvm/include/llvm/Analysis/TargetTransformInfo.h
llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
llvm/include/llvm/Support/MemoryRefInfo.h
llvm/include/llvm/Transforms/Instrumentation/AddressSanitizerCommon.h
llvm/lib/Analysis/TargetTransformInfo.cpp
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
llvm/test/Instrumentation/AddressSanitizer/RISCV/asan-rvv-intrinsics.ll
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