[llvm] 4a9e6c4 - [SelectionDAG] Correct AddNodeIDCustom for MemIntrinsicSDNodes.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu May 11 16:29:00 PDT 2023
Author: Craig Topper
Date: 2023-05-11T16:28:47-07:00
New Revision: 4a9e6c422f5dd1e1d0681d3e781ed9370011acec
URL: https://github.com/llvm/llvm-project/commit/4a9e6c422f5dd1e1d0681d3e781ed9370011acec
DIFF: https://github.com/llvm/llvm-project/commit/4a9e6c422f5dd1e1d0681d3e781ed9370011acec.diff
LOG: [SelectionDAG] Correct AddNodeIDCustom for MemIntrinsicSDNodes.
We were missing any support for ISD::INTRINSIC_W_CHAIN/INTRINSIC_VOID
used for memory operations.
For ISD::PREFETCH and target memory nodes we didn't add the subclass
data.
This patch handles all MemIntrinsicSDNode in one place and adds the
missing subclass data.
Note. Unlike load/stores we don't add the memory VT in AddNodeIDCustom or getMemIntrinsicNode. Not sure why.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D150387
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
llvm/test/CodeGen/X86/pr57340.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 9d5ca06ada5d7..86c872ce9ebaa 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -892,12 +892,6 @@ static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
ID.AddInteger(AT->getMemOperand()->getFlags());
break;
}
- case ISD::PREFETCH: {
- const MemSDNode *PF = cast<MemSDNode>(N);
- ID.AddInteger(PF->getPointerInfo().getAddrSpace());
- ID.AddInteger(PF->getMemOperand()->getFlags());
- break;
- }
case ISD::VECTOR_SHUFFLE: {
const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
@@ -916,12 +910,17 @@ static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
case ISD::AssertAlign:
ID.AddInteger(cast<AssertAlignSDNode>(N)->getAlign().value());
break;
+ case ISD::PREFETCH:
+ case ISD::INTRINSIC_VOID:
+ case ISD::INTRINSIC_W_CHAIN:
+ // Handled by MemIntrinsicSDNode check after the switch.
+ break;
} // end switch (N->getOpcode())
- // Target specific memory nodes could also have address spaces and flags
+ // MemIntrinsic nodes could also have subclass data, address spaces, and flags
// to check.
- if (N->isTargetMemoryOpcode()) {
- const MemSDNode *MN = cast<MemSDNode>(N);
+ if (auto *MN = dyn_cast<MemIntrinsicSDNode>(N)) {
+ ID.AddInteger(MN->getRawSubclassData());
ID.AddInteger(MN->getPointerInfo().getAddrSpace());
ID.AddInteger(MN->getMemOperand()->getFlags());
}
diff --git a/llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll b/llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
index aea1014c84be6..cb8e63539bf81 100644
--- a/llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
+++ b/llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
@@ -2041,33 +2041,29 @@ define void @vec384_i8_widen_to_i24_factor3_broadcast_to_v16i24_factor16(ptr %in
;
; AVX512F-LABEL: vec384_i8_widen_to_i24_factor3_broadcast_to_v16i24_factor16:
; AVX512F: # %bb.0:
-; AVX512F-NEXT: vpbroadcastb (%rdi), %ymm0
-; AVX512F-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0
-; AVX512F-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512F-NEXT: vpalignr {{.*#+}} xmm1 = mem[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0]
-; AVX512F-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[15,0,1,15,3,4,15,6,7,15,9,10,15,12,13,15]
-; AVX512F-NEXT: vpbroadcastb (%rdi), %xmm2
-; AVX512F-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
-; AVX512F-NEXT: vpaddb (%rsi), %ymm1, %ymm1
-; AVX512F-NEXT: vpaddb 32(%rsi), %ymm0, %ymm0
-; AVX512F-NEXT: vmovdqa %ymm0, 32(%rdx)
-; AVX512F-NEXT: vmovdqa %ymm1, (%rdx)
+; AVX512F-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512F-NEXT: vpalignr {{.*#+}} xmm0 = mem[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0]
+; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[15,0,1,15,3,4,15,6,7,15,9,10,15,12,13,15]
+; AVX512F-NEXT: vpbroadcastb (%rdi), %xmm1
+; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX512F-NEXT: vpaddb (%rsi), %ymm0, %ymm0
+; AVX512F-NEXT: vpaddb 32(%rsi), %ymm1, %ymm1
+; AVX512F-NEXT: vmovdqa %ymm1, 32(%rdx)
+; AVX512F-NEXT: vmovdqa %ymm0, (%rdx)
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
; AVX512DQ-LABEL: vec384_i8_widen_to_i24_factor3_broadcast_to_v16i24_factor16:
; AVX512DQ: # %bb.0:
-; AVX512DQ-NEXT: vpbroadcastb (%rdi), %ymm0
-; AVX512DQ-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0
-; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm1
-; AVX512DQ-NEXT: vpalignr {{.*#+}} xmm1 = mem[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0]
-; AVX512DQ-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[15,0,1,15,3,4,15,6,7,15,9,10,15,12,13,15]
-; AVX512DQ-NEXT: vpbroadcastb (%rdi), %xmm2
-; AVX512DQ-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
-; AVX512DQ-NEXT: vpaddb (%rsi), %ymm1, %ymm1
-; AVX512DQ-NEXT: vpaddb 32(%rsi), %ymm0, %ymm0
-; AVX512DQ-NEXT: vmovdqa %ymm0, 32(%rdx)
-; AVX512DQ-NEXT: vmovdqa %ymm1, (%rdx)
+; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512DQ-NEXT: vpalignr {{.*#+}} xmm0 = mem[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0]
+; AVX512DQ-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[15,0,1,15,3,4,15,6,7,15,9,10,15,12,13,15]
+; AVX512DQ-NEXT: vpbroadcastb (%rdi), %xmm1
+; AVX512DQ-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX512DQ-NEXT: vpaddb (%rsi), %ymm0, %ymm0
+; AVX512DQ-NEXT: vpaddb 32(%rsi), %ymm1, %ymm1
+; AVX512DQ-NEXT: vmovdqa %ymm1, 32(%rdx)
+; AVX512DQ-NEXT: vmovdqa %ymm0, (%rdx)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/pr57340.ll b/llvm/test/CodeGen/X86/pr57340.ll
index 11a1b9c521fe1..6ae04d5ca2fdb 100644
--- a/llvm/test/CodeGen/X86/pr57340.ll
+++ b/llvm/test/CodeGen/X86/pr57340.ll
@@ -5,11 +5,11 @@ define void @main.41() local_unnamed_addr #1 {
; CHECK-LABEL: main.41:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vpbroadcastw (%rax), %xmm0
-; CHECK-NEXT: vpextrw $0, %xmm0, %eax
; CHECK-NEXT: vmovdqu (%rax), %ymm2
-; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
+; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm3
; CHECK-NEXT: vmovdqa {{.*#+}} ymm1 = [31,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14]
-; CHECK-NEXT: vpermi2w %ymm0, %ymm2, %ymm1
+; CHECK-NEXT: vpermi2w %ymm3, %ymm2, %ymm1
+; CHECK-NEXT: vpextrw $0, %xmm0, %eax
; CHECK-NEXT: movzwl %ax, %eax
; CHECK-NEXT: vmovd %eax, %xmm0
; CHECK-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -22,20 +22,20 @@ define void @main.41() local_unnamed_addr #1 {
; CHECK-NEXT: setnp %al
; CHECK-NEXT: sete %cl
; CHECK-NEXT: testb %al, %cl
-; CHECK-NEXT: setne %al
-; CHECK-NEXT: andl $1, %eax
-; CHECK-NEXT: kmovw %eax, %k0
-; CHECK-NEXT: vpsrld $16, %xmm1, %xmm0
-; CHECK-NEXT: vpextrw $0, %xmm0, %eax
-; CHECK-NEXT: movzwl %ax, %eax
-; CHECK-NEXT: vmovd %eax, %xmm0
-; CHECK-NEXT: vcvtph2ps %xmm0, %xmm0
-; CHECK-NEXT: vpsrld $16, %xmm6, %xmm3
+; CHECK-NEXT: vpsrld $16, %xmm1, %xmm3
; CHECK-NEXT: vpextrw $0, %xmm3, %eax
; CHECK-NEXT: movzwl %ax, %eax
; CHECK-NEXT: vmovd %eax, %xmm3
-; CHECK-NEXT: vcvtph2ps %xmm3, %xmm3
-; CHECK-NEXT: vucomiss %xmm0, %xmm3
+; CHECK-NEXT: vpsrld $16, %xmm6, %xmm4
+; CHECK-NEXT: vpextrw $0, %xmm4, %eax
+; CHECK-NEXT: movzwl %ax, %eax
+; CHECK-NEXT: vmovd %eax, %xmm4
+; CHECK-NEXT: setne %al
+; CHECK-NEXT: andl $1, %eax
+; CHECK-NEXT: vcvtph2ps %xmm3, %xmm5
+; CHECK-NEXT: vcvtph2ps %xmm4, %xmm3
+; CHECK-NEXT: kmovw %eax, %k0
+; CHECK-NEXT: vucomiss %xmm5, %xmm3
; CHECK-NEXT: setnp %al
; CHECK-NEXT: sete %cl
; CHECK-NEXT: testb %al, %cl
@@ -47,14 +47,11 @@ define void @main.41() local_unnamed_addr #1 {
; CHECK-NEXT: movw $-5, %ax
; CHECK-NEXT: kmovd %eax, %k1
; CHECK-NEXT: kandw %k1, %k0, %k0
-; CHECK-NEXT: vprolq $32, %xmm1, %xmm0
-; CHECK-NEXT: vpextrw $0, %xmm0, %eax
+; CHECK-NEXT: vprolq $32, %xmm1, %xmm4
+; CHECK-NEXT: vpextrw $0, %xmm4, %eax
; CHECK-NEXT: movzwl %ax, %eax
-; CHECK-NEXT: vmovd %eax, %xmm0
-; CHECK-NEXT: vcvtph2ps %xmm0, %xmm4
-; CHECK-NEXT: movzwl (%rax), %eax
-; CHECK-NEXT: vmovd %eax, %xmm0
-; CHECK-NEXT: vcvtph2ps %xmm0, %xmm0
+; CHECK-NEXT: vmovd %eax, %xmm4
+; CHECK-NEXT: vcvtph2ps %xmm4, %xmm4
; CHECK-NEXT: vucomiss %xmm4, %xmm0
; CHECK-NEXT: setnp %al
; CHECK-NEXT: sete %cl
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